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74
blender-5.2.0/extern/gmp-source/mpn/x86_64/README vendored Normal file
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Copyright 2003, 2004, 2006, 2008 Free Software Foundation, Inc.
This file is part of the GNU MP Library.
The GNU MP Library is free software; you can redistribute it and/or modify
it under the terms of either:
* the GNU Lesser General Public License as published by the Free
Software Foundation; either version 3 of the License, or (at your
option) any later version.
or
* the GNU General Public License as published by the Free Software
Foundation; either version 2 of the License, or (at your option) any
later version.
or both in parallel, as here.
The GNU MP Library is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
for more details.
You should have received copies of the GNU General Public License and the
GNU Lesser General Public License along with the GNU MP Library. If not,
see https://www.gnu.org/licenses/.
AMD64 MPN SUBROUTINES
This directory contains mpn functions for AMD64 chips. It is also useful
for 64-bit Pentiums, and "Core 2".
RELEVANT OPTIMIZATION ISSUES
The Opteron and Athlon64 can sustain up to 3 instructions per cycle, but in
practice that is only possible for integer instructions. But almost any
three integer instructions can issue simultaneously, including any 3 ALU
operations, including shifts. Up to two memory operations can issue each
cycle.
Scheduling typically requires that load-use instructions are split into
separate load and use instructions. That requires more decode resources,
and it is rarely a win. Opteron/Athlon64 have deep out-of-order core.
Optimizing for 64-bit Pentium4 is probably a waste of time, as the most
critical instructions are very poorly implemented here. Perhaps we could
save a cycle or two, but the most common loops now run at between 10 and 22
cycles, so a saved cycle isn't too exciting.
The new spin of the venerable P6 core, the "Core 2" is much better than the
Pentium4 for the GMP loops. Its integer pipeline is somewhat similar to to
the Opteron/Athlon64 pipeline, except that the GMP favourites ADC/SBB and
MUL are slower. Furthermore, an INC/DEC followed by ADC/SBB incur a
pipeline stall of around 10 cycles. The default mpn_add_n and mpn_sub_n
code suffers badly from the stall. The code in the core2 subdirectory uses
the almost forgotten instruction JRCXZ for loop control, and updates the
induction variable using LEA.
REFERENCES
"System V Application Binary Interface AMD64 Architecture Processor
Supplement", draft version 0.99, December 2007.
http://www.x86-64.org/documentation/abi.pdf

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blender-5.2.0/extern/gmp-source/mpn/x86_64/alderlake/addmul_1.asm vendored Normal file
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dnl AMD64 mpn_addmul_1 for CPUs with mulx and adx.
dnl Contributed to the GNU project by Torbjörn Granlund.
dnl Copyright 2012, 2013, 2022 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/limb
C AMD K8,K9 -
C AMD K10 -
C AMD bd1 -
C AMD bd2 -
C AMD bd3 -
C AMD bd4 -
C AMD zn1 ?
C AMD zn2 ?
C AMD zn3 ?
C AMD bt1 -
C AMD bt2 -
C Intel P4 -
C Intel CNR -
C Intel PNR -
C Intel NHM -
C Intel WSM -
C Intel SBR -
C Intel IBR -
C Intel HWL -
C Intel BWL ?
C Intel SKL ?
C Intel RKL ?
C Intel ALD 1.29
C Intel atom -
C Intel SLM -
C Intel GLM -
C VIA nano -
define(`rp', `%rdi') dnl rcx
define(`up', `%rsi') dnl rdx
define(`n_param', `%rdx') dnl r8
define(`v0_param',`%rcx') dnl r9
define(`n', `%rcx') dnl
define(`v0', `%rdx') dnl
ASM_START()
TEXT
ALIGN(16)
PROLOGUE(mpn_addmul_1)
mov (up), %r8
push %rbx
push %r12
push %r13
mov %rdx, %rax
mov %rcx, v0
mov %rax, n
and $3, R8(%rax)
jz L(b0)
cmp $2, R8(%rax)
jl L(b1)
jz L(b2)
L(b3): mulx( %r8, %r11, %r10)
mulx( 8,(up), %r13, %r12)
mulx( 16,(up), %rbx, %rax)
inc n
lea -8(up), up
lea -24(rp), rp
jmp L(lo3)
L(b0): mulx( %r8, %r9, %r8)
mulx( 8,(up), %r11, %r10)
mulx( 16,(up), %r13, %r12)
lea -16(rp), rp
jmp L(lo0)
L(b2): mulx( %r8, %r13, %r12)
mulx( 8,(up), %rbx, %rax)
lea -2(n), n
jrcxz L(n2)
mulx( 16,(up), %r9, %r8)
lea 16(up), up
jmp L(lo2)
L(n2): jmp L(wd2)
L(b1): mulx( %r8, %rbx, %rax)
sub $1, n
jrcxz L(n1)
mulx( 8,(up), %r9, %r8)
mulx( 16,(up), %r11, %r10)
lea 8(up), up
lea -8(rp), rp
jmp L(lo1)
L(n1): add (rp), %rbx
adc %rcx, %rax
mov %rbx, (rp)
pop %r13
pop %r12
pop %rbx
ret
L(top): mulx( (up), %r9, %r8)
adcx( %r10, %r13)
mov %r11, -8(rp)
L(lo2): adox( (rp), %r13)
mulx( 8,(up), %r11, %r10)
adcx( %r12, %rbx)
mov %r13, (rp)
L(lo1): adox( 8,(rp), %rbx)
mulx( 16,(up), %r13, %r12)
adcx( %rax, %r9)
mov %rbx, 8(rp)
L(lo0): adox( 16,(rp), %r9)
mulx( 24,(up), %rbx, %rax)
adcx( %r8, %r11)
mov %r9, 16(rp)
L(lo3): adox( 24,(rp), %r11)
lea 32(up), up
lea 32(rp), rp
lea -4(n), n
jrcxz L(end)
jmp L(top)
L(end): adcx( %r10, %r13)
mov %r11, -8(rp)
L(wd2): adox( (rp), %r13)
adcx( %r12, %rbx)
mov %r13, (rp)
adox( 8,(rp), %rbx)
adcx( %rcx, %rax)
adox( %rcx, %rax)
mov %rbx, 8(rp)
pop %r13
pop %r12
pop %rbx
ret
EPILOGUE()
ASM_END()

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/* Intel Alder Lake gmp-mparam.h -- Compiler/machine parameter header file.
Copyright 2022 Free Software Foundation, Inc.
This file is part of the GNU MP Library.
The GNU MP Library is free software; you can redistribute it and/or modify
it under the terms of either:
* the GNU Lesser General Public License as published by the Free
Software Foundation; either version 3 of the License, or (at your
option) any later version.
or
* the GNU General Public License as published by the Free Software
Foundation; either version 2 of the License, or (at your option) any
later version.
or both in parallel, as here.
The GNU MP Library is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
for more details.
You should have received copies of the GNU General Public License and the
GNU Lesser General Public License along with the GNU MP Library. If not,
see https://www.gnu.org/licenses/. */
#define GMP_LIMB_BITS 64
#define GMP_LIMB_BYTES 8
/* Disable use of slow functions. FIXME: We should disable lib inclusion. */
#undef HAVE_NATIVE_mpn_mul_2
#undef HAVE_NATIVE_mpn_addmul_2
/* 3700-4900 MHz Alder Lake */
/* FFT tuning limit = 10,000,000 */
/* Generated by tuneup.c, 2022-03-15, gcc 11.2 */
#define MOD_1_NORM_THRESHOLD MP_SIZE_T_MAX /* never */
#define MOD_1_UNNORM_THRESHOLD MP_SIZE_T_MAX /* never */
#define MOD_1N_TO_MOD_1_1_THRESHOLD 5
#define MOD_1U_TO_MOD_1_1_THRESHOLD 4
#define MOD_1_1_TO_MOD_1_2_THRESHOLD 12
#define MOD_1_2_TO_MOD_1_4_THRESHOLD 23
#define PREINV_MOD_1_TO_MOD_1_THRESHOLD 8
#define USE_PREINV_DIVREM_1 1 /* native */
#define DIV_QR_1_NORM_THRESHOLD 34
#define DIV_QR_1_UNNORM_THRESHOLD MP_SIZE_T_MAX /* never */
#define DIV_QR_2_PI2_THRESHOLD 30
#define DIVEXACT_1_THRESHOLD 0 /* always (native) */
#define BMOD_1_TO_MOD_1_THRESHOLD 23
#define DIV_1_VS_MUL_1_PERCENT 559
#define MUL_TOOM22_THRESHOLD 13
#define MUL_TOOM33_THRESHOLD 97
#define MUL_TOOM44_THRESHOLD 148
#define MUL_TOOM6H_THRESHOLD 562
#define MUL_TOOM8H_THRESHOLD 608
#define MUL_TOOM32_TO_TOOM43_THRESHOLD 97
#define MUL_TOOM32_TO_TOOM53_THRESHOLD 259
#define MUL_TOOM42_TO_TOOM53_THRESHOLD 98
#define MUL_TOOM42_TO_TOOM63_THRESHOLD 98
#define MUL_TOOM43_TO_TOOM54_THRESHOLD 144
#define SQR_BASECASE_THRESHOLD 0 /* always (native) */
#define SQR_TOOM2_THRESHOLD 24
#define SQR_TOOM3_THRESHOLD 86
#define SQR_TOOM4_THRESHOLD 582
#define SQR_TOOM6_THRESHOLD 0 /* always */
#define SQR_TOOM8_THRESHOLD 753
#define MULMID_TOOM42_THRESHOLD 40
#define MULMOD_BNM1_THRESHOLD 13
#define SQRMOD_BNM1_THRESHOLD 16
#define MUL_FFT_MODF_THRESHOLD 384 /* k = 5 */
#define MUL_FFT_TABLE3 \
{ { 384, 5}, { 21, 6}, { 11, 5}, { 23, 6}, \
{ 21, 7}, { 11, 6}, { 24, 7}, { 24, 8}, \
{ 13, 7}, { 27, 8}, { 15, 7}, { 31, 8}, \
{ 23, 7}, { 47, 8}, { 27, 9}, { 15, 8}, \
{ 33, 9}, { 19, 8}, { 39, 9}, { 23, 8}, \
{ 49, 9}, { 27,10}, { 15, 9}, { 31, 8}, \
{ 63, 9}, { 39,10}, { 23, 9}, { 51,11}, \
{ 15,10}, { 31, 9}, { 71,10}, { 39, 9}, \
{ 83,10}, { 47, 9}, { 95,10}, { 55,11}, \
{ 31,10}, { 79,11}, { 47,10}, { 95,12}, \
{ 31,11}, { 63,10}, { 127, 9}, { 255, 8}, \
{ 511,10}, { 135,11}, { 79, 9}, { 319, 8}, \
{ 639, 9}, { 335, 8}, { 671,11}, { 95,12}, \
{ 63,11}, { 127,10}, { 255, 9}, { 511,10}, \
{ 271, 9}, { 543, 8}, { 1087, 9}, { 575,10}, \
{ 303, 9}, { 607,10}, { 319, 9}, { 639,10}, \
{ 335, 9}, { 671,10}, { 351,12}, { 95,11}, \
{ 191,10}, { 383,13}, { 63,12}, { 127,11}, \
{ 255,10}, { 511,11}, { 271,10}, { 543, 9}, \
{ 1087,11}, { 287,10}, { 575,11}, { 303,10}, \
{ 607, 9}, { 1215,11}, { 319,10}, { 671,11}, \
{ 351,10}, { 703,11}, { 367,10}, { 735, 9}, \
{ 1471, 8}, { 2943,12}, { 191,11}, { 383,10}, \
{ 767,11}, { 415,10}, { 831,12}, { 223,11}, \
{ 447,10}, { 895,11}, { 479,10}, { 959,13}, \
{ 127,12}, { 255,11}, { 511,10}, { 1023,11}, \
{ 543,10}, { 1087, 9}, { 2175,12}, { 287,11}, \
{ 575,10}, { 1151,11}, { 607,12}, { 319,11}, \
{ 639,10}, { 1279,11}, { 671,12}, { 351,11}, \
{ 703,10}, { 1407,11}, { 735,10}, { 1471, 9}, \
{ 2943, 8}, { 5887,12}, { 383,11}, { 767,10}, \
{ 1535,12}, { 415,11}, { 831,10}, { 1663,12}, \
{ 447,11}, { 895,10}, { 1791,12}, { 479,11}, \
{ 959,14}, { 127,13}, { 255,12}, { 511,11}, \
{ 1023,12}, { 543,11}, { 1087,12}, { 575,11}, \
{ 1151,12}, { 607,11}, { 1215,13}, { 319,12}, \
{ 639,11}, { 1279,12}, { 671,11}, { 1343,12}, \
{ 703,11}, { 1407,12}, { 735,11}, { 1471,10}, \
{ 2943,13}, { 383,12}, { 767,11}, { 1535,12}, \
{ 831,13}, { 447,12}, { 959,11}, { 1919,13}, \
{ 511,12}, { 1087,13}, { 575,12}, { 1215,13}, \
{ 639,12}, { 1343,13}, { 703,12}, { 1471,11}, \
{ 2943,14}, { 383,13}, { 767,12}, { 1535,13}, \
{ 831,12}, { 1663,13}, { 959,12}, { 1919,14}, \
{ 511,13}, { 1087,12}, { 2175,13}, { 1215,14}, \
{ 16384,15}, { 32768,16}, { 65536,17}, { 131072,18}, \
{ 262144,19}, { 524288,20}, {1048576,21}, {2097152,22}, \
{4194304,23}, {8388608,24} }
#define MUL_FFT_TABLE3_SIZE 190
#define MUL_FFT_THRESHOLD 2496
#define SQR_FFT_MODF_THRESHOLD 344 /* k = 5 */
#define SQR_FFT_TABLE3 \
{ { 344, 5}, { 21, 6}, { 11, 5}, { 23, 6}, \
{ 25, 7}, { 13, 6}, { 27, 7}, { 25, 8}, \
{ 13, 7}, { 27, 8}, { 15, 7}, { 31, 8}, \
{ 21, 9}, { 11, 8}, { 27, 9}, { 15, 8}, \
{ 35, 9}, { 19, 8}, { 41, 9}, { 23, 8}, \
{ 47, 9}, { 27,10}, { 15, 9}, { 39,10}, \
{ 23, 9}, { 51,11}, { 15,10}, { 31, 9}, \
{ 63,10}, { 39, 9}, { 79,10}, { 47,11}, \
{ 31,10}, { 79,11}, { 47,10}, { 95,12}, \
{ 31,11}, { 63,10}, { 127, 9}, { 255, 8}, \
{ 511,11}, { 79, 9}, { 319,11}, { 95,10}, \
{ 191, 9}, { 383,12}, { 63,11}, { 127,10}, \
{ 255, 9}, { 511,10}, { 271, 9}, { 543,11}, \
{ 143,10}, { 287, 9}, { 575,10}, { 303, 9}, \
{ 607,10}, { 319, 9}, { 639,12}, { 95,11}, \
{ 191,10}, { 383,13}, { 63,12}, { 127,11}, \
{ 255,10}, { 511,11}, { 271,10}, { 543,11}, \
{ 287,10}, { 575,11}, { 303,10}, { 607,11}, \
{ 319,10}, { 639,11}, { 335,10}, { 671,11}, \
{ 351,10}, { 703,12}, { 191,11}, { 383,10}, \
{ 767,11}, { 415,10}, { 831,12}, { 223,11}, \
{ 447,10}, { 895,11}, { 479,10}, { 959,13}, \
{ 127,12}, { 255,11}, { 511,10}, { 1023,11}, \
{ 543,10}, { 1087,12}, { 287,11}, { 575,10}, \
{ 1151,11}, { 607,10}, { 1215,12}, { 319,11}, \
{ 639,10}, { 1279,11}, { 671,12}, { 351,11}, \
{ 703,10}, { 1407,13}, { 191,12}, { 383,11}, \
{ 767,12}, { 415,11}, { 831,12}, { 447,11}, \
{ 895,12}, { 479,11}, { 959,10}, { 1919,14}, \
{ 127,13}, { 255,12}, { 511,11}, { 1023,12}, \
{ 543,11}, { 1087,12}, { 575,11}, { 1151,12}, \
{ 607,11}, { 1215,13}, { 319,12}, { 639,11}, \
{ 1279,12}, { 671,11}, { 1343,12}, { 703,11}, \
{ 1407,13}, { 383,12}, { 831,13}, { 447,12}, \
{ 959,14}, { 255,13}, { 511,12}, { 1087,13}, \
{ 575,12}, { 1215,13}, { 639,12}, { 1343,13}, \
{ 703,12}, { 1407,14}, { 383,13}, { 767,12}, \
{ 1535,13}, { 831,12}, { 1663,13}, { 959,14}, \
{ 511,13}, { 1087,12}, { 2175,13}, { 1215,14}, \
{ 16384,15}, { 32768,16}, { 65536,17}, { 131072,18}, \
{ 262144,19}, { 524288,20}, {1048576,21}, {2097152,22}, \
{4194304,23}, {8388608,24} }
#define SQR_FFT_TABLE3_SIZE 166
#define SQR_FFT_THRESHOLD 2240
#define MULLO_BASECASE_THRESHOLD 0 /* always */
#define MULLO_DC_THRESHOLD 56
#define MULLO_MUL_N_THRESHOLD 4940
#define SQRLO_BASECASE_THRESHOLD 10
#define SQRLO_DC_THRESHOLD 73
#define SQRLO_SQR_THRESHOLD 4392
#define DC_DIV_QR_THRESHOLD 19
#define DC_DIVAPPR_Q_THRESHOLD 139
#define DC_BDIV_QR_THRESHOLD 62
#define DC_BDIV_Q_THRESHOLD 126
#define INV_MULMOD_BNM1_THRESHOLD 24
#define INV_NEWTON_THRESHOLD 108
#define INV_APPR_THRESHOLD 108
#define BINV_NEWTON_THRESHOLD 208
#define REDC_1_TO_REDC_2_THRESHOLD 36
#define REDC_2_TO_REDC_N_THRESHOLD 53
#define MU_DIV_QR_THRESHOLD 855
#define MU_DIVAPPR_Q_THRESHOLD 1120
#define MUPI_DIV_QR_THRESHOLD 0 /* always */
#define MU_BDIV_QR_THRESHOLD 807
#define MU_BDIV_Q_THRESHOLD 1470
#define POWM_SEC_TABLE 1,11,70,702,2499
#define GET_STR_DC_THRESHOLD 11
#define GET_STR_PRECOMPUTE_THRESHOLD 17
#define SET_STR_DC_THRESHOLD 2150
#define SET_STR_PRECOMPUTE_THRESHOLD 2943
#define FAC_DSC_THRESHOLD 298
#define FAC_ODD_THRESHOLD 51
#define MATRIX22_STRASSEN_THRESHOLD 17
#define HGCD2_DIV1_METHOD 1 /* 2.38% faster than 3 */
#define HGCD_THRESHOLD 142
#define HGCD_APPR_THRESHOLD 159
#define HGCD_REDUCE_THRESHOLD 2384
#define GCD_DC_THRESHOLD 483
#define GCDEXT_DC_THRESHOLD 492
#define JACOBI_BASE_METHOD 1 /* 0.94% faster than 3 */

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dnl AMD64 mpn_mul_basecase.
dnl Contributed to the GNU project by Torbjörn Granlund.
dnl Copyright 2012, 2013, 2022 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/limb
C AMD K8,K9 -
C AMD K10 -
C AMD bd1 -
C AMD bd2 -
C AMD bd3 -
C AMD bd4 -
C AMD zn1 ?
C AMD zn2 ?
C AMD zn3 ?
C AMD bt1 -
C AMD bt2 -
C Intel P4 -
C Intel CNR -
C Intel PNR -
C Intel NHM -
C Intel WSM -
C Intel SBR -
C Intel IBR -
C Intel HWL -
C Intel BWL ?
C Intel SKL ?
C Intel RKL ?
C Intel ALD 1.29
C Intel atom -
C Intel SLM -
C Intel GLM -
C VIA nano -
C TODO
C * Do overlapped software pipelining.
C * Try shallower pipeline, which would result in using fewer registers.
C * There are false dependencies on CF/OF between iterations. Try breaking
C them to see if it helps.
define(`rp', `%rdi') dnl rcx
define(`up', `%rsi') dnl rdx
define(`un_arg',`%rdx') dnl r8
define(`vp_arg',`%rcx') dnl r9
define(`vn_arg',`%r8') dnl stack
define(`un', `%r14')
define(`vp', `%r15')
define(`vn', `%rbp')
define(`n', `%rcx')
define(`v0', `%rdx')
ASM_START()
TEXT
ALIGN(16)
PROLOGUE(mpn_mul_basecase)
cmp $2, un_arg
ja L(gen)
mov (vp_arg), %rdx
mulx( (up), %rax, %r9)
mov %rax, (rp)
je L(s2x)
mov %r9, 8(rp)
ret
L(s2x): mulx( 8,(up), %rax, %r10)
add %r9, %rax
adc $0, %r10
cmp $2, R32(vn_arg)
je L(s22)
L(s21): mov %rax, 8(rp)
mov %r10, 16(rp)
ret
L(s22): mov 8(vp_arg), %rdx
mulx( (up), %r8, %r9)
add %r8, %rax
adc %r10, %r9
mov %rax, 8(rp)
mulx( 8,(up), %rax, %r10)
adc $0, %r10
adc %r9, %rax
mov %rax, 16(rp)
adc $0, %r10
mov %r10, 24(rp)
ret
L(gen): push %rbx
push %rbp
push %r12
push %r13
push %r14
push %r15
mov un_arg, un
neg un
shl $3, un
mov vp_arg, vp
mov vn_arg, vn
test $1, R8(un_arg)
mov (vp), %rdx
jz L(bx0)
L(bx1): test $16, R8(un)
jnz L(b01)
L(b11): lea 24(un), n
mulx( (up), %r11, %r10)
mulx( 8,(up), %r13, %r12)
mulx( 16,(up), %rbx, %rax)
lea 8(rp), rp
lea 24(up), up
jrcxz L(med3)
L(mtp3):mulx( (up), %r9, %r8)
adcx( %r10, %r13)
mov %r11, -8(rp)
mulx( 8,(up), %r11, %r10)
adcx( %r12, %rbx)
mov %r13, (rp)
mulx( 16,(up), %r13, %r12)
adcx( %rax, %r9)
mov %rbx, 8(rp)
mulx( 24,(up), %rbx, %rax)
adcx( %r8, %r11)
mov %r9, 16(rp)
lea 32(up), up
lea 32(rp), rp
lea 32(n), n
jrcxz L(med3)
jmp L(mtp3)
L(med3):adcx( %r10, %r13)
mov %r11, -8(rp)
adcx( %r12, %rbx)
mov %r13, (rp)
adcx( %rcx, %rax)
mov %rbx, 8(rp)
mov %rax, 16(rp)
dec vn
jz L(ret)
L(out3):lea 32(rp,un), rp
lea 24(up,un), up
lea 8(vp), vp
xor R32(%rdx), R32(%rdx)
mov (vp), %rdx
mulx( -24,(up), %r11, %r10)
mulx( -16,(up), %r13, %r12)
mulx( -8,(up), %rbx, %rax)
lea 24(un), n
adox( -8,(rp), %r11)
jrcxz L(ed3)
L(tp3): mulx( (up), %r9, %r8)
adcx( %r10, %r13)
mov %r11, -8(rp)
adox( (rp), %r13)
mulx( 8,(up), %r11, %r10)
adcx( %r12, %rbx)
mov %r13, (rp)
adox( 8,(rp), %rbx)
mulx( 16,(up), %r13, %r12)
adcx( %rax, %r9)
mov %rbx, 8(rp)
adox( 16,(rp), %r9)
mulx( 24,(up), %rbx, %rax)
adcx( %r8, %r11)
mov %r9, 16(rp)
adox( 24,(rp), %r11)
lea 32(up), up
lea 32(rp), rp
lea 32(n), n
jrcxz L(ed3)
jmp L(tp3)
L(ed3): adcx( %r10, %r13)
mov %r11, -8(rp)
adox( (rp), %r13)
adcx( %r12, %rbx)
mov %r13, (rp)
adox( 8,(rp), %rbx)
adcx( %rcx, %rax)
adox( %rcx, %rax)
mov %rbx, 8(rp)
mov %rax, 16(rp)
dec vn
jnz L(out3)
jmp L(ret)
L(b01): mulx( (up), %rbx, %rax)
lea 8(un), n
mulx( 8,(up), %r9, %r8)
mulx( 16,(up), %r11, %r10)
lea 8(up), up
lea -8(rp), rp
jmp L(ml1)
L(mtp1):mulx( (up), %r9, %r8)
adcx( %r10, %r13)
mov %r11, -8(rp)
mulx( 8,(up), %r11, %r10)
adcx( %r12, %rbx)
mov %r13, (rp)
L(ml1): mulx( 16,(up), %r13, %r12)
adcx( %rax, %r9)
mov %rbx, 8(rp)
mulx( 24,(up), %rbx, %rax)
adcx( %r8, %r11)
mov %r9, 16(rp)
lea 32(up), up
lea 32(rp), rp
lea 32(n), n
jrcxz L(med1)
jmp L(mtp1)
L(med1):adcx( %r10, %r13)
mov %r11, -8(rp)
adcx( %r12, %rbx)
mov %r13, (rp)
adcx( %rcx, %rax)
mov %rbx, 8(rp)
mov %rax, 16(rp)
dec vn
jz L(ret)
L(out1):lea 16(rp,un), rp
lea 8(up,un), up
lea 8(vp), vp
xor R32(%rdx), R32(%rdx)
mov (vp), %rdx
lea 8(un), n
mulx( -8,(up), %rbx, %rax)
mulx( (up), %r9, %r8)
mulx( 8,(up), %r11, %r10)
jmp L(lo1)
L(tp1): mulx( (up), %r9, %r8)
adcx( %r10, %r13)
mov %r11, -8(rp)
adox( (rp), %r13)
mulx( 8,(up), %r11, %r10)
adcx( %r12, %rbx)
mov %r13, (rp)
L(lo1): adox( 8,(rp), %rbx)
mulx( 16,(up), %r13, %r12)
adcx( %rax, %r9)
mov %rbx, 8(rp)
adox( 16,(rp), %r9)
mulx( 24,(up), %rbx, %rax)
adcx( %r8, %r11)
mov %r9, 16(rp)
adox( 24,(rp), %r11)
lea 32(up), up
lea 32(rp), rp
lea 32(n), n
jrcxz L(ed1)
jmp L(tp1)
L(ed1): adcx( %r10, %r13)
mov %r11, -8(rp)
adox( (rp), %r13)
adcx( %r12, %rbx)
mov %r13, (rp)
adox( 8,(rp), %rbx)
adcx( %rcx, %rax)
adox( %rcx, %rax)
mov %rbx, 8(rp)
mov %rax, 16(rp)
dec vn
jnz L(out1)
jmp L(ret)
L(bx0): test $16, R8(un)
jz L(b00)
L(b10): mulx( (up), %r13, %r12)
mulx( 8,(up), %rbx, %rax)
lea 16(un), n
mulx( 16,(up), %r9, %r8)
lea 16(up), up
jmp L(ml2)
L(mtp2):mulx( (up), %r9, %r8)
adcx( %r10, %r13)
mov %r11, -8(rp)
L(ml2): mulx( 8,(up), %r11, %r10)
adcx( %r12, %rbx)
mov %r13, (rp)
mulx( 16,(up), %r13, %r12)
adcx( %rax, %r9)
mov %rbx, 8(rp)
mulx( 24,(up), %rbx, %rax)
adcx( %r8, %r11)
mov %r9, 16(rp)
lea 32(up), up
lea 32(rp), rp
lea 32(n), n
jrcxz L(med2)
jmp L(mtp2)
L(med2):adcx( %r10, %r13)
mov %r11, -8(rp)
adcx( %r12, %rbx)
mov %r13, (rp)
adcx( %rcx, %rax)
mov %rbx, 8(rp)
mov %rax, 16(rp)
dec vn
jz L(ret)
L(out2):lea 24(rp,un), rp
lea 16(up,un), up
lea 8(vp), vp
xor R32(%rdx), R32(%rdx)
mov (vp), %rdx
mulx( -16,(up), %r13, %r12)
mulx( -8,(up), %rbx, %rax)
lea 16(un), n
mulx( (up), %r9, %r8)
jmp L(lo2)
L(tp2): mulx( (up), %r9, %r8)
adcx( %r10, %r13)
mov %r11, -8(rp)
L(lo2): adox( (rp), %r13)
mulx( 8,(up), %r11, %r10)
adcx( %r12, %rbx)
mov %r13, (rp)
adox( 8,(rp), %rbx)
mulx( 16,(up), %r13, %r12)
adcx( %rax, %r9)
mov %rbx, 8(rp)
adox( 16,(rp), %r9)
mulx( 24,(up), %rbx, %rax)
adcx( %r8, %r11)
mov %r9, 16(rp)
adox( 24,(rp), %r11)
lea 32(up), up
lea 32(rp), rp
lea 32(n), n
jrcxz L(ed2)
jmp L(tp2)
L(ed2): adcx( %r10, %r13)
mov %r11, -8(rp)
adox( (rp), %r13)
adcx( %r12, %rbx)
mov %r13, (rp)
adox( 8,(rp), %rbx)
adcx( %rcx, %rax)
adox( %rcx, %rax)
mov %rbx, 8(rp)
mov %rax, 16(rp)
dec vn
jnz L(out2)
jmp L(ret)
L(b00): lea 32(un), n
mulx( (up), %r9, %r8)
mulx( 8,(up), %r11, %r10)
mulx( 16,(up), %r13, %r12)
mulx( 24,(up), %rbx, %rax)
adcx( %r8, %r11)
mov %r9, (rp)
lea 32(up), up
lea 16(rp), rp
jrcxz L(med0)
L(mtp0):mulx( (up), %r9, %r8)
adcx( %r10, %r13)
mov %r11, -8(rp)
mulx( 8,(up), %r11, %r10)
adcx( %r12, %rbx)
mov %r13, (rp)
mulx( 16,(up), %r13, %r12)
adcx( %rax, %r9)
mov %rbx, 8(rp)
mulx( 24,(up), %rbx, %rax)
adcx( %r8, %r11)
mov %r9, 16(rp)
lea 32(up), up
lea 32(rp), rp
lea 32(n), n
jrcxz L(med0)
jmp L(mtp0)
L(med0):adcx( %r10, %r13)
mov %r11, -8(rp)
adcx( %r12, %rbx)
mov %r13, (rp)
adcx( %rcx, %rax)
mov %rbx, 8(rp)
mov %rax, 16(rp)
dec vn
jz L(ret)
L(out0):lea 40(rp,un), rp
lea 32(up,un), up
lea 8(vp), vp
xor R32(%rdx), R32(%rdx)
mov (vp), %rdx
lea 32(un), n
mulx( -32,(up), %r9, %r8)
mulx( -24,(up), %r11, %r10)
mulx( -16,(up), %r13, %r12)
adox( -16,(rp), %r9)
mulx( -8,(up), %rbx, %rax)
adcx( %r8, %r11)
mov %r9, -16(rp)
adox( -8,(rp), %r11)
jrcxz L(ed0)
L(tp0): mulx( (up), %r9, %r8)
adcx( %r10, %r13)
mov %r11, -8(rp)
adox( (rp), %r13)
mulx( 8,(up), %r11, %r10)
adcx( %r12, %rbx)
mov %r13, (rp)
adox( 8,(rp), %rbx)
mulx( 16,(up), %r13, %r12)
adcx( %rax, %r9)
mov %rbx, 8(rp)
adox( 16,(rp), %r9)
mulx( 24,(up), %rbx, %rax)
adcx( %r8, %r11)
mov %r9, 16(rp)
adox( 24,(rp), %r11)
lea 32(up), up
lea 32(rp), rp
lea 32(n), n
jrcxz L(ed0)
jmp L(tp0)
L(ed0): adcx( %r10, %r13)
mov %r11, -8(rp)
adox( (rp), %r13)
adcx( %r12, %rbx)
mov %r13, (rp)
adox( 8,(rp), %rbx)
adcx( %rcx, %rax)
adox( %rcx, %rax)
mov %rbx, 8(rp)
mov %rax, 16(rp)
dec vn
jnz L(out0)
L(ret): pop %r15
pop %r14
pop %r13
pop %r12
pop %rbp
pop %rbx
ret
EPILOGUE()
ASM_END()

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dnl AMD64 mpn_submul_1 for CPUs with mulx and adx.
dnl Contributed to the GNU project by Torbjörn Granlund.
dnl Copyright 2022 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/limb
C AMD K8,K9 -
C AMD K10 -
C AMD bd1 -
C AMD bd2 -
C AMD bd3 -
C AMD bd4 -
C AMD zn1 ?
C AMD zn2 ?
C AMD zn3 2.0
C AMD bt1 -
C AMD bt2 -
C Intel P4 -
C Intel CNR -
C Intel PNR -
C Intel NHM -
C Intel WSM -
C Intel SBR -
C Intel IBR -
C Intel HWL -
C Intel BWL ?
C Intel SKL ?
C Intel RKL 2.0
C Intel ALD 1.53
C Intel atom -
C Intel SLM -
C Intel GLM -
C VIA nano -
define(`rp', `%rdi') dnl rcx
define(`up', `%rsi') dnl rdx
define(`n_param', `%rdx') dnl r8
define(`v0_param',`%rcx') dnl r9
define(`n', `%rcx') dnl
define(`v0', `%rdx') dnl
ASM_START()
TEXT
ALIGN(16)
PROLOGUE(mpn_submul_1)
mov n_param, %rax
mov v0_param, v0
mov %rax, n
test $1, R8(n)
jz L(bx0)
L(bx1): mulx( (up), %r9, %rax)
test $2, R8(n)
stc
jz L(b01)
L(b11): lea 1(n), n
lea 16(up), up
lea 16(rp), rp
jmp L(lo3)
L(b01): lea 3(n), n
jmp L(lo1)
L(bx0): mulx( (up), %r9, %r8)
test $2, R8(n)
stc
jz L(b00)
L(b10): lea 8(up), up
lea 8(rp), rp
lea 2(n), n
jmp L(lo2)
L(b00): lea 24(up), up
lea 24(rp), rp
jmp L(lo0)
L(top): lea 32(up), up
lea 32(rp), rp
mulx( -24,(up), %r9, %r8)
adox( %rax, %r9)
L(lo0): not %r9
adcx( -24,(rp), %r9)
mov %r9, -24(rp)
mulx( -16,(up), %r9, %rax)
adox( %r8, %r9)
L(lo3): not %r9
adcx( -16,(rp), %r9)
mov %r9, -16(rp)
mulx( -8,(up), %r9, %r8)
adox( %rax, %r9)
L(lo2): not %r9
adcx( -8,(rp), %r9)
mov %r9, -8(rp)
mulx( (up), %r9, %rax)
adox( %r8, %r9)
L(lo1): not %r9
adcx( (rp), %r9)
mov %r9, (rp)
lea -4(n), n
jrcxz L(end)
jmp L(top)
L(end): adox( %rcx, %rax)
sbb $-1, %rax
ret
EPILOGUE()
ASM_END()

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dnl AMD64 mpn_addlsh1_n -- rp[] = up[] + (vp[] << 1)
dnl AMD64 mpn_rsblsh1_n -- rp[] = (vp[] << 1) - up[]
dnl Copyright 2003, 2005-2009, 2011, 2012 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/limb
C AMD K8,K9 2
C AMD K10 2
C AMD bd1 ?
C AMD bobcat ?
C Intel P4 13
C Intel core2 3.45
C Intel NHM ?
C Intel SBR ?
C Intel atom ?
C VIA nano ?
C Sometimes speed degenerates, supposedly related to that some operand
C alignments cause cache conflicts.
C The speed is limited by decoding/issue bandwidth. There are 22 instructions
C in the loop, which corresponds to ceil(22/3)/4 = 1.83 c/l.
C INPUT PARAMETERS
define(`rp',`%rdi')
define(`up',`%rsi')
define(`vp',`%rdx')
define(`n', `%rcx')
ifdef(`OPERATION_addlsh1_n', `
define(ADDSUB, add)
define(ADCSBB, adc)
define(func, mpn_addlsh1_n)')
ifdef(`OPERATION_rsblsh1_n', `
define(ADDSUB, sub)
define(ADCSBB, sbb)
define(func, mpn_rsblsh1_n)')
MULFUNC_PROLOGUE(mpn_addlsh1_n mpn_rsblsh1_n)
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
ASM_START()
TEXT
ALIGN(16)
PROLOGUE(func)
FUNC_ENTRY(4)
push %rbp
mov (vp), %r8
mov R32(n), R32(%rax)
lea (rp,n,8), rp
lea (up,n,8), up
lea (vp,n,8), vp
neg n
xor R32(%rbp), R32(%rbp)
and $3, R32(%rax)
je L(b00)
cmp $2, R32(%rax)
jc L(b01)
je L(b10)
L(b11): add %r8, %r8
mov 8(vp,n,8), %r9
adc %r9, %r9
mov 16(vp,n,8), %r10
adc %r10, %r10
sbb R32(%rax), R32(%rax) C save scy
ADDSUB (up,n,8), %r8
ADCSBB 8(up,n,8), %r9
mov %r8, (rp,n,8)
mov %r9, 8(rp,n,8)
ADCSBB 16(up,n,8), %r10
mov %r10, 16(rp,n,8)
sbb R32(%rbp), R32(%rbp) C save acy
add $3, n
jmp L(ent)
L(b10): add %r8, %r8
mov 8(vp,n,8), %r9
adc %r9, %r9
sbb R32(%rax), R32(%rax) C save scy
ADDSUB (up,n,8), %r8
ADCSBB 8(up,n,8), %r9
mov %r8, (rp,n,8)
mov %r9, 8(rp,n,8)
sbb R32(%rbp), R32(%rbp) C save acy
add $2, n
jmp L(ent)
L(b01): add %r8, %r8
sbb R32(%rax), R32(%rax) C save scy
ADDSUB (up,n,8), %r8
mov %r8, (rp,n,8)
sbb R32(%rbp), R32(%rbp) C save acy
inc n
L(ent): jns L(end)
ALIGN(16)
L(top): add R32(%rax), R32(%rax) C restore scy
mov (vp,n,8), %r8
L(b00): adc %r8, %r8
mov 8(vp,n,8), %r9
adc %r9, %r9
mov 16(vp,n,8), %r10
adc %r10, %r10
mov 24(vp,n,8), %r11
adc %r11, %r11
sbb R32(%rax), R32(%rax) C save scy
add R32(%rbp), R32(%rbp) C restore acy
ADCSBB (up,n,8), %r8
nop C Hammer speedup!
ADCSBB 8(up,n,8), %r9
mov %r8, (rp,n,8)
mov %r9, 8(rp,n,8)
ADCSBB 16(up,n,8), %r10
ADCSBB 24(up,n,8), %r11
mov %r10, 16(rp,n,8)
mov %r11, 24(rp,n,8)
sbb R32(%rbp), R32(%rbp) C save acy
add $4, n
js L(top)
L(end):
ifdef(`OPERATION_addlsh1_n',`
add R32(%rbp), R32(%rax)
neg R32(%rax)')
ifdef(`OPERATION_rsblsh1_n',`
sub R32(%rax), R32(%rbp)
movslq R32(%rbp), %rax')
pop %rbp
FUNC_EXIT()
ret
EPILOGUE()

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dnl AMD64 mpn_addlsh2_n -- rp[] = up[] + (vp[] << 2)
dnl AMD64 mpn_rsblsh2_n -- rp[] = (vp[] << 2) - up[]
dnl Contributed to the GNU project by Torbjorn Granlund.
dnl Copyright 2009-2011 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
define(LSH, 2)
define(RSH, 62)
ifdef(`OPERATION_addlsh2_n',`
define(ADDSUB, add)
define(ADCSBB, adc)
define(func, mpn_addlsh2_n)')
ifdef(`OPERATION_rsblsh2_n',`
define(ADDSUB, sub)
define(ADCSBB, sbb)
define(func, mpn_rsblsh2_n)')
MULFUNC_PROLOGUE(mpn_addlsh2_n mpn_rsblsh2_n)
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
include_mpn(`x86_64/aorrlshC_n.asm')

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dnl AMD64 mpn_addlshC_n -- rp[] = up[] + (vp[] << C)
dnl AMD64 mpn_rsblshC_n -- rp[] = (vp[] << C) - up[]
dnl Copyright 2009-2012 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
C cycles/limb
C AMD K8,K9 2.1
C AMD K10 2.0
C AMD bd1 ~2.7
C AMD bd2 ~2.7
C AMD bd3 ?
C AMD bd4 ?
C AMD zen 2.0
C AMD bt1 3.3
C AMD bt2 3.0
C Intel P4 ?
C Intel PNR 3.0
C Intel NHM 2.75
C Intel SBR 2.55
C Intel IBR 2.49
C Intel HWL 2.25
C Intel BWL 1.89
C Intel SKL 1.90
C Intel atom 8.4
C Intel SLM 4.0
C VIA nano ?
C INPUT PARAMETERS
define(`rp', `%rdi')
define(`up', `%rsi')
define(`vp', `%rdx')
define(`n', `%rcx')
define(M, eval(m4_lshift(1,LSH)))
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
ASM_START()
TEXT
ALIGN(16)
PROLOGUE(func)
FUNC_ENTRY(4)
push %r12
push %r13
push %r14
push %r15
mov (vp), %r8
lea (,%r8,M), %r12
shr $RSH, %r8
mov R32(n), R32(%rax)
lea (rp,n,8), rp
lea (up,n,8), up
lea (vp,n,8), vp
neg n
and $3, R8(%rax)
je L(b00)
cmp $2, R8(%rax)
jc L(b01)
je L(b10)
L(b11): mov 8(vp,n,8), %r10
lea (%r8,%r10,M), %r14
shr $RSH, %r10
mov 16(vp,n,8), %r11
lea (%r10,%r11,M), %r15
shr $RSH, %r11
ADDSUB (up,n,8), %r12
ADCSBB 8(up,n,8), %r14
ADCSBB 16(up,n,8), %r15
sbb R32(%rax), R32(%rax) C save carry for next
mov %r12, (rp,n,8)
mov %r14, 8(rp,n,8)
mov %r15, 16(rp,n,8)
add $3, n
js L(top)
jmp L(end)
L(b01): mov %r8, %r11
ADDSUB (up,n,8), %r12
sbb R32(%rax), R32(%rax) C save carry for next
mov %r12, (rp,n,8)
add $1, n
js L(top)
jmp L(end)
L(b10): mov 8(vp,n,8), %r11
lea (%r8,%r11,M), %r15
shr $RSH, %r11
ADDSUB (up,n,8), %r12
ADCSBB 8(up,n,8), %r15
sbb R32(%rax), R32(%rax) C save carry for next
mov %r12, (rp,n,8)
mov %r15, 8(rp,n,8)
add $2, n
js L(top)
jmp L(end)
L(b00): mov 8(vp,n,8), %r9
mov 16(vp,n,8), %r10
jmp L(e00)
ALIGN(16)
L(top): mov 16(vp,n,8), %r10
mov (vp,n,8), %r8
mov 8(vp,n,8), %r9
lea (%r11,%r8,M), %r12
shr $RSH, %r8
L(e00): lea (%r8,%r9,M), %r13
shr $RSH, %r9
mov 24(vp,n,8), %r11
lea (%r9,%r10,M), %r14
shr $RSH, %r10
lea (%r10,%r11,M), %r15
shr $RSH, %r11
add R32(%rax), R32(%rax) C restore carry
ADCSBB (up,n,8), %r12
ADCSBB 8(up,n,8), %r13
ADCSBB 16(up,n,8), %r14
ADCSBB 24(up,n,8), %r15
mov %r12, (rp,n,8)
mov %r13, 8(rp,n,8)
mov %r14, 16(rp,n,8)
sbb R32(%rax), R32(%rax) C save carry for next
mov %r15, 24(rp,n,8)
add $4, n
js L(top)
L(end):
ifelse(ADDSUB,add,`
sub R32(%r11), R32(%rax)
neg R32(%rax)
',`
add R32(%r11), R32(%rax)
movslq R32(%rax), %rax
')
pop %r15
pop %r14
pop %r13
pop %r12
FUNC_EXIT()
ret
EPILOGUE()

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dnl AMD64 mpn_addlsh_n and mpn_rsblsh_n. R = V2^k +- U.
dnl Copyright 2006, 2010-2012 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/limb
C AMD K8,K9 3.1 < 3.85 for lshift + add_n
C AMD K10 3.1 < 3.85 for lshift + add_n
C Intel P4 14.6 > 7.33 for lshift + add_n
C Intel core2 3.87 > 3.27 for lshift + add_n
C Intel NHM 4 > 3.75 for lshift + add_n
C Intel SBR (5.8) > 3.46 for lshift + add_n
C Intel atom (7.75) < 8.75 for lshift + add_n
C VIA nano 4.7 < 6.25 for lshift + add_n
C This was written quickly and not optimized at all. Surely one could get
C closer to 3 c/l or perhaps even under 3 c/l. Ideas:
C 1) Use indexing to save the 3 LEA
C 2) Write reasonable feed-in code
C 3) Be more clever about register usage
C 4) Unroll more, handling CL negation, carry save/restore cost much now
C 5) Reschedule
C INPUT PARAMETERS
define(`rp', `%rdi')
define(`up', `%rsi')
define(`vp', `%rdx')
define(`n', `%rcx')
define(`cnt', `%r8')
ifdef(`OPERATION_addlsh_n',`
define(ADCSBB, `adc')
define(func, mpn_addlsh_n)
')
ifdef(`OPERATION_rsblsh_n',`
define(ADCSBB, `sbb')
define(func, mpn_rsblsh_n)
')
MULFUNC_PROLOGUE(mpn_addlsh_n mpn_rsblsh_n)
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
ASM_START()
TEXT
ALIGN(16)
PROLOGUE(func)
FUNC_ENTRY(4)
IFDOS(` mov 56(%rsp), %r8d ')
push %r12
push %r13
push %r14
push %rbp
push %rbx
mov n, %rax
xor R32(%rbx), R32(%rbx) C clear carry save register
mov R32(%r8), R32(%rcx) C shift count
xor R32(%rbp), R32(%rbp) C limb carry
mov R32(%rax), R32(%r11)
and $3, R32(%r11)
je L(4)
sub $1, R32(%r11)
L(012): mov (vp), %r8
mov %r8, %r12
shl R8(%rcx), %r8
or %rbp, %r8
neg R8(%rcx)
mov %r12, %rbp
shr R8(%rcx), %rbp
neg R8(%rcx)
add R32(%rbx), R32(%rbx)
ADCSBB (up), %r8
mov %r8, (rp)
sbb R32(%rbx), R32(%rbx)
lea 8(up), up
lea 8(vp), vp
lea 8(rp), rp
sub $1, R32(%r11)
jnc L(012)
L(4): sub $4, %rax
jc L(end)
ALIGN(16)
L(top): mov (vp), %r8
mov %r8, %r12
mov 8(vp), %r9
mov %r9, %r13
mov 16(vp), %r10
mov %r10, %r14
mov 24(vp), %r11
shl R8(%rcx), %r8
shl R8(%rcx), %r9
shl R8(%rcx), %r10
or %rbp, %r8
mov %r11, %rbp
shl R8(%rcx), %r11
neg R8(%rcx)
shr R8(%rcx), %r12
shr R8(%rcx), %r13
shr R8(%rcx), %r14
shr R8(%rcx), %rbp C used next iteration
or %r12, %r9
or %r13, %r10
or %r14, %r11
neg R8(%rcx)
add R32(%rbx), R32(%rbx) C restore carry flag
ADCSBB (up), %r8
ADCSBB 8(up), %r9
ADCSBB 16(up), %r10
ADCSBB 24(up), %r11
mov %r8, (rp)
mov %r9, 8(rp)
mov %r10, 16(rp)
mov %r11, 24(rp)
sbb R32(%rbx), R32(%rbx) C save carry flag
lea 32(up), up
lea 32(vp), vp
lea 32(rp), rp
sub $4, %rax
jnc L(top)
L(end): add R32(%rbx), R32(%rbx)
ADCSBB $0, %rbp
mov %rbp, %rax
pop %rbx
pop %rbp
pop %r14
pop %r13
pop %r12
FUNC_EXIT()
ret
EPILOGUE()

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dnl AMD64 mpn_add_err1_n, mpn_sub_err1_n
dnl Contributed by David Harvey.
dnl Copyright 2011 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/limb
C AMD K8,K9 2.75 (degenerates to 3 c/l for some alignments)
C AMD K10 ?
C Intel P4 ?
C Intel core2 ?
C Intel corei ?
C Intel atom ?
C VIA nano ?
C INPUT PARAMETERS
define(`rp', `%rdi')
define(`up', `%rsi')
define(`vp', `%rdx')
define(`ep', `%rcx')
define(`yp', `%r8')
define(`n', `%r9')
define(`cy_param', `8(%rsp)')
define(`el', `%rbx')
define(`eh', `%rbp')
define(`t0', `%r10')
define(`t1', `%r11')
define(`t2', `%r12')
define(`t3', `%r13')
define(`w0', `%r14')
define(`w1', `%r15')
ifdef(`OPERATION_add_err1_n', `
define(ADCSBB, adc)
define(func, mpn_add_err1_n)')
ifdef(`OPERATION_sub_err1_n', `
define(ADCSBB, sbb)
define(func, mpn_sub_err1_n)')
MULFUNC_PROLOGUE(mpn_add_err1_n mpn_sub_err1_n)
ASM_START()
TEXT
ALIGN(16)
PROLOGUE(func)
mov cy_param, %rax
push %rbx
push %rbp
push %r12
push %r13
push %r14
push %r15
lea (up,n,8), up
lea (vp,n,8), vp
lea (rp,n,8), rp
mov R32(n), R32(%r10)
and $3, R32(%r10)
jz L(0mod4)
cmp $2, R32(%r10)
jc L(1mod4)
jz L(2mod4)
L(3mod4):
xor R32(el), R32(el)
xor R32(eh), R32(eh)
xor R32(t0), R32(t0)
xor R32(t1), R32(t1)
lea -24(yp,n,8), yp
neg n
shr $1, %al C restore carry
mov (up,n,8), w0
mov 8(up,n,8), w1
ADCSBB (vp,n,8), w0
mov w0, (rp,n,8)
cmovc 16(yp), el
ADCSBB 8(vp,n,8), w1
mov w1, 8(rp,n,8)
cmovc 8(yp), t0
mov 16(up,n,8), w0
ADCSBB 16(vp,n,8), w0
mov w0, 16(rp,n,8)
cmovc (yp), t1
setc %al C save carry
add t0, el
adc $0, eh
add t1, el
adc $0, eh
add $3, n
jnz L(loop)
jmp L(end)
ALIGN(16)
L(0mod4):
xor R32(el), R32(el)
xor R32(eh), R32(eh)
lea (yp,n,8), yp
neg n
jmp L(loop)
ALIGN(16)
L(1mod4):
xor R32(el), R32(el)
xor R32(eh), R32(eh)
lea -8(yp,n,8), yp
neg n
shr $1, %al C restore carry
mov (up,n,8), w0
ADCSBB (vp,n,8), w0
mov w0, (rp,n,8)
cmovc (yp), el
setc %al C save carry
add $1, n
jnz L(loop)
jmp L(end)
ALIGN(16)
L(2mod4):
xor R32(el), R32(el)
xor R32(eh), R32(eh)
xor R32(t0), R32(t0)
lea -16(yp,n,8), yp
neg n
shr $1, %al C restore carry
mov (up,n,8), w0
mov 8(up,n,8), w1
ADCSBB (vp,n,8), w0
mov w0, (rp,n,8)
cmovc 8(yp), el
ADCSBB 8(vp,n,8), w1
mov w1, 8(rp,n,8)
cmovc (yp), t0
setc %al C save carry
add t0, el
adc $0, eh
add $2, n
jnz L(loop)
jmp L(end)
ALIGN(32)
L(loop):
shr $1, %al C restore carry
mov -8(yp), t0
mov $0, R32(t3)
mov (up,n,8), w0
mov 8(up,n,8), w1
ADCSBB (vp,n,8), w0
cmovnc t3, t0
ADCSBB 8(vp,n,8), w1
mov -16(yp), t1
mov w0, (rp,n,8)
mov 16(up,n,8), w0
mov w1, 8(rp,n,8)
cmovnc t3, t1
mov -24(yp), t2
ADCSBB 16(vp,n,8), w0
cmovnc t3, t2
mov 24(up,n,8), w1
ADCSBB 24(vp,n,8), w1
cmovc -32(yp), t3
setc %al C save carry
add t0, el
adc $0, eh
add t1, el
adc $0, eh
add t2, el
adc $0, eh
mov w0, 16(rp,n,8)
add t3, el
lea -32(yp), yp
adc $0, eh
mov w1, 24(rp,n,8)
add $4, n
jnz L(loop)
L(end):
mov el, (ep)
mov eh, 8(ep)
pop %r15
pop %r14
pop %r13
pop %r12
pop %rbp
pop %rbx
ret
EPILOGUE()

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dnl AMD64 mpn_add_err2_n, mpn_sub_err2_n
dnl Contributed by David Harvey.
dnl Copyright 2011 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/limb
C AMD K8,K9 4.5
C AMD K10 ?
C Intel P4 ?
C Intel core2 6.9
C Intel corei ?
C Intel atom ?
C VIA nano ?
C INPUT PARAMETERS
define(`rp', `%rdi')
define(`up', `%rsi')
define(`vp', `%rdx')
define(`ep', `%rcx')
define(`yp1', `%r8')
define(`yp2', `%r9')
define(`n_param', `8(%rsp)')
define(`cy_param', `16(%rsp)')
define(`cy1', `%r14')
define(`cy2', `%rax')
define(`n', `%r10')
define(`w', `%rbx')
define(`e1l', `%rbp')
define(`e1h', `%r11')
define(`e2l', `%r12')
define(`e2h', `%r13')
ifdef(`OPERATION_add_err2_n', `
define(ADCSBB, adc)
define(func, mpn_add_err2_n)')
ifdef(`OPERATION_sub_err2_n', `
define(ADCSBB, sbb)
define(func, mpn_sub_err2_n)')
MULFUNC_PROLOGUE(mpn_add_err2_n mpn_sub_err2_n)
ASM_START()
TEXT
ALIGN(16)
PROLOGUE(func)
mov cy_param, cy2
mov n_param, n
push %rbx
push %rbp
push %r12
push %r13
push %r14
xor R32(e1l), R32(e1l)
xor R32(e1h), R32(e1h)
xor R32(e2l), R32(e2l)
xor R32(e2h), R32(e2h)
sub yp1, yp2
lea (rp,n,8), rp
lea (up,n,8), up
lea (vp,n,8), vp
test $1, n
jnz L(odd)
lea -8(yp1,n,8), yp1
neg n
jmp L(top)
ALIGN(16)
L(odd):
lea -16(yp1,n,8), yp1
neg n
shr $1, cy2
mov (up,n,8), w
ADCSBB (vp,n,8), w
cmovc 8(yp1), e1l
cmovc 8(yp1,yp2), e2l
mov w, (rp,n,8)
sbb cy2, cy2
inc n
jz L(end)
ALIGN(16)
L(top):
mov (up,n,8), w
shr $1, cy2 C restore carry
ADCSBB (vp,n,8), w
mov w, (rp,n,8)
sbb cy1, cy1 C generate mask, preserve CF
mov 8(up,n,8), w
ADCSBB 8(vp,n,8), w
mov w, 8(rp,n,8)
sbb cy2, cy2 C generate mask, preserve CF
mov (yp1), w C (e1h:e1l) += cy1 * yp1 limb
and cy1, w
add w, e1l
adc $0, e1h
and (yp1,yp2), cy1 C (e2h:e2l) += cy1 * yp2 limb
add cy1, e2l
adc $0, e2h
mov -8(yp1), w C (e1h:e1l) += cy2 * next yp1 limb
and cy2, w
add w, e1l
adc $0, e1h
mov -8(yp1,yp2), w C (e2h:e2l) += cy2 * next yp2 limb
and cy2, w
add w, e2l
adc $0, e2h
add $2, n
lea -16(yp1), yp1
jnz L(top)
L(end):
mov e1l, (ep)
mov e1h, 8(ep)
mov e2l, 16(ep)
mov e2h, 24(ep)
and $1, %eax C return carry
pop %r14
pop %r13
pop %r12
pop %rbp
pop %rbx
ret
EPILOGUE()

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dnl AMD64 mpn_add_err3_n, mpn_sub_err3_n
dnl Contributed by David Harvey.
dnl Copyright 2011 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/limb
C AMD K8,K9 7.0
C AMD K10 ?
C Intel P4 ?
C Intel core2 ?
C Intel corei ?
C Intel atom ?
C VIA nano ?
C INPUT PARAMETERS
define(`rp', `%rdi')
define(`up', `%rsi')
define(`vp', `%rdx')
define(`ep', `%rcx')
define(`yp1', `%r8')
define(`yp2', `%r9')
define(`yp3_param', `8(%rsp)')
define(`n_param', `16(%rsp)')
define(`cy_param', `24(%rsp)')
define(`n', `%r10')
define(`yp3', `%rcx')
define(`t', `%rbx')
define(`e1l', `%rbp')
define(`e1h', `%r11')
define(`e2l', `%r12')
define(`e2h', `%r13')
define(`e3l', `%r14')
define(`e3h', `%r15')
ifdef(`OPERATION_add_err3_n', `
define(ADCSBB, adc)
define(func, mpn_add_err3_n)')
ifdef(`OPERATION_sub_err3_n', `
define(ADCSBB, sbb)
define(func, mpn_sub_err3_n)')
MULFUNC_PROLOGUE(mpn_add_err3_n mpn_sub_err3_n)
ASM_START()
TEXT
ALIGN(16)
PROLOGUE(func)
mov cy_param, %rax
mov n_param, n
push %rbx
push %rbp
push %r12
push %r13
push %r14
push %r15
push ep
mov 64(%rsp), yp3 C load from yp3_param
xor R32(e1l), R32(e1l)
xor R32(e1h), R32(e1h)
xor R32(e2l), R32(e2l)
xor R32(e2h), R32(e2h)
xor R32(e3l), R32(e3l)
xor R32(e3h), R32(e3h)
sub yp1, yp2
sub yp1, yp3
lea -8(yp1,n,8), yp1
lea (rp,n,8), rp
lea (up,n,8), up
lea (vp,n,8), vp
neg n
ALIGN(16)
L(top):
shr $1, %rax C restore carry
mov (up,n,8), %rax
ADCSBB (vp,n,8), %rax
mov %rax, (rp,n,8)
sbb %rax, %rax C save carry and generate mask
mov (yp1), t
and %rax, t
add t, e1l
adc $0, e1h
mov (yp1,yp2), t
and %rax, t
add t, e2l
adc $0, e2h
mov (yp1,yp3), t
and %rax, t
add t, e3l
adc $0, e3h
lea -8(yp1), yp1
inc n
jnz L(top)
L(end):
and $1, %eax
pop ep
mov e1l, (ep)
mov e1h, 8(ep)
mov e2l, 16(ep)
mov e2h, 24(ep)
mov e3l, 32(ep)
mov e3h, 40(ep)
pop %r15
pop %r14
pop %r13
pop %r12
pop %rbp
pop %rbx
ret
EPILOGUE()

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dnl AMD64 mpn_add_n, mpn_sub_n
dnl Copyright 2003-2005, 2007, 2008, 2010-2012 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/limb
C AMD K8,K9 1.5
C AMD K10 1.5
C AMD bd1 1.8
C AMD bd2 1.74
C AMD bd3 ?
C AMD bd4 1.78
C AMD zen 1.5
C AMD bt1 2.54
C AMD bt2 2.15
C Intel P4 11.5
C Intel core2 4.9
C Intel NHM 5.53
C Intel SBR 1.59
C Intel IBR 1.55
C Intel HWL 1.44
C Intel BWL 1.14
C Intel SKL 1.21
C Intel atom 4
C Intel SLM 3
C VIA nano 3.25
C The loop of this code is the result of running a code generation and
C optimization tool suite written by David Harvey and Torbjorn Granlund.
C INPUT PARAMETERS
define(`rp', `%rdi') C rcx
define(`up', `%rsi') C rdx
define(`vp', `%rdx') C r8
define(`n', `%rcx') C r9
define(`cy', `%r8') C rsp+40 (mpn_add_nc and mpn_sub_nc)
ifdef(`OPERATION_add_n', `
define(ADCSBB, adc)
define(func, mpn_add_n)
define(func_nc, mpn_add_nc)')
ifdef(`OPERATION_sub_n', `
define(ADCSBB, sbb)
define(func, mpn_sub_n)
define(func_nc, mpn_sub_nc)')
MULFUNC_PROLOGUE(mpn_add_n mpn_add_nc mpn_sub_n mpn_sub_nc)
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
ASM_START()
TEXT
ALIGN(16)
PROLOGUE(func_nc)
FUNC_ENTRY(4)
IFDOS(` mov 56(%rsp), %r8 ')
mov R32(n), R32(%rax)
shr $2, n
and $3, R32(%rax)
bt $0, %r8 C cy flag <- carry parameter
jrcxz L(lt4)
mov (up), %r8
mov 8(up), %r9
dec n
jmp L(mid)
EPILOGUE()
ALIGN(16)
PROLOGUE(func)
FUNC_ENTRY(4)
mov R32(n), R32(%rax)
shr $2, n
and $3, R32(%rax)
jrcxz L(lt4)
mov (up), %r8
mov 8(up), %r9
dec n
jmp L(mid)
L(lt4): dec R32(%rax)
mov (up), %r8
jnz L(2)
ADCSBB (vp), %r8
mov %r8, (rp)
adc R32(%rax), R32(%rax)
FUNC_EXIT()
ret
L(2): dec R32(%rax)
mov 8(up), %r9
jnz L(3)
ADCSBB (vp), %r8
ADCSBB 8(vp), %r9
mov %r8, (rp)
mov %r9, 8(rp)
adc R32(%rax), R32(%rax)
FUNC_EXIT()
ret
L(3): mov 16(up), %r10
ADCSBB (vp), %r8
ADCSBB 8(vp), %r9
ADCSBB 16(vp), %r10
mov %r8, (rp)
mov %r9, 8(rp)
mov %r10, 16(rp)
setc R8(%rax)
FUNC_EXIT()
ret
ALIGN(16)
L(top): ADCSBB (vp), %r8
ADCSBB 8(vp), %r9
ADCSBB 16(vp), %r10
ADCSBB 24(vp), %r11
mov %r8, (rp)
lea 32(up), up
mov %r9, 8(rp)
mov %r10, 16(rp)
dec n
mov %r11, 24(rp)
lea 32(vp), vp
mov (up), %r8
mov 8(up), %r9
lea 32(rp), rp
L(mid): mov 16(up), %r10
mov 24(up), %r11
jnz L(top)
L(end): lea 32(up), up
ADCSBB (vp), %r8
ADCSBB 8(vp), %r9
ADCSBB 16(vp), %r10
ADCSBB 24(vp), %r11
lea 32(vp), vp
mov %r8, (rp)
mov %r9, 8(rp)
mov %r10, 16(rp)
mov %r11, 24(rp)
lea 32(rp), rp
inc R32(%rax)
dec R32(%rax)
jnz L(lt4)
adc R32(%rax), R32(%rax)
FUNC_EXIT()
ret
EPILOGUE()

190
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dnl AMD64 mpn_addmul_1 and mpn_submul_1.
dnl Copyright 2003-2005, 2007, 2008, 2011, 2012 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/limb
C AMD K8,K9 2.52
C AMD K10 2.51
C AMD bd1 4.43
C AMD bd2 5.03 5.63
C AMD bd3 ?
C AMD bd4 ?
C AMD zen ?
C AMD bobcat 6.20
C AMD jaguar 5.57 6.56
C Intel P4 14.9 17.1
C Intel core2 5.15
C Intel NHM 4.93
C Intel SBR 3.95
C Intel IBR 3.75
C Intel HWL 3.62
C Intel BWL 2.53
C Intel SKL 2.53
C Intel atom 21.3
C Intel SLM 9.0
C VIA nano 5.0
C The loop of this code is the result of running a code generation and
C optimization tool suite written by David Harvey and Torbjorn Granlund.
C TODO
C * The loop is great, but the prologue and epilogue code was quickly written.
C Tune it!
define(`rp', `%rdi') C rcx
define(`up', `%rsi') C rdx
define(`n_param', `%rdx') C r8
define(`vl', `%rcx') C r9
define(`n', `%r11')
ifdef(`OPERATION_addmul_1',`
define(`ADDSUB', `add')
define(`func', `mpn_addmul_1')
')
ifdef(`OPERATION_submul_1',`
define(`ADDSUB', `sub')
define(`func', `mpn_submul_1')
')
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
MULFUNC_PROLOGUE(mpn_addmul_1 mpn_submul_1)
IFDOS(` define(`up', ``%rsi'') ') dnl
IFDOS(` define(`rp', ``%rcx'') ') dnl
IFDOS(` define(`vl', ``%r9'') ') dnl
IFDOS(` define(`r9', ``rdi'') ') dnl
IFDOS(` define(`n', ``%r8'') ') dnl
IFDOS(` define(`r8', ``r11'') ') dnl
ASM_START()
TEXT
ALIGN(16)
PROLOGUE(func)
IFDOS(``push %rsi '')
IFDOS(``push %rdi '')
IFDOS(``mov %rdx, %rsi '')
mov (up), %rax C read first u limb early
push %rbx
IFSTD(` mov n_param, %rbx ') C move away n from rdx, mul uses it
IFDOS(` mov n, %rbx ')
mul vl
IFSTD(` mov %rbx, n ')
and $3, R32(%rbx)
jz L(b0)
cmp $2, R32(%rbx)
jz L(b2)
jg L(b3)
L(b1): dec n
jne L(gt1)
ADDSUB %rax, (rp)
jmp L(ret)
L(gt1): lea 8(up,n,8), up
lea -8(rp,n,8), rp
neg n
xor %r10, %r10
xor R32(%rbx), R32(%rbx)
mov %rax, %r9
mov (up,n,8), %rax
mov %rdx, %r8
jmp L(L1)
L(b0): lea (up,n,8), up
lea -16(rp,n,8), rp
neg n
xor %r10, %r10
mov %rax, %r8
mov %rdx, %rbx
jmp L(L0)
L(b3): lea -8(up,n,8), up
lea -24(rp,n,8), rp
neg n
mov %rax, %rbx
mov %rdx, %r10
jmp L(L3)
L(b2): lea -16(up,n,8), up
lea -32(rp,n,8), rp
neg n
xor %r8, %r8
xor R32(%rbx), R32(%rbx)
mov %rax, %r10
mov 24(up,n,8), %rax
mov %rdx, %r9
jmp L(L2)
ALIGN(16)
L(top): ADDSUB %r10, (rp,n,8)
adc %rax, %r9
mov (up,n,8), %rax
adc %rdx, %r8
mov $0, R32(%r10)
L(L1): mul vl
ADDSUB %r9, 8(rp,n,8)
adc %rax, %r8
adc %rdx, %rbx
L(L0): mov 8(up,n,8), %rax
mul vl
ADDSUB %r8, 16(rp,n,8)
adc %rax, %rbx
adc %rdx, %r10
L(L3): mov 16(up,n,8), %rax
mul vl
ADDSUB %rbx, 24(rp,n,8)
mov $0, R32(%r8) C zero
mov %r8, %rbx C zero
adc %rax, %r10
mov 24(up,n,8), %rax
mov %r8, %r9 C zero
adc %rdx, %r9
L(L2): mul vl
add $4, n
js L(top)
ADDSUB %r10, (rp,n,8)
adc %rax, %r9
adc %r8, %rdx
ADDSUB %r9, 8(rp,n,8)
L(ret): adc $0, %rdx
mov %rdx, %rax
pop %rbx
IFDOS(``pop %rdi '')
IFDOS(``pop %rsi '')
ret
EPILOGUE()

186
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dnl AMD64 mpn_addmul_2 optimised for Intel Atom.
dnl Copyright 2008, 2011-2013 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/limb best
C AMD K8,K9
C AMD K10
C AMD bd1
C AMD bd2
C AMD bobcat
C AMD jaguar
C Intel P4
C Intel PNR
C Intel NHM
C Intel SBR
C Intel IBR
C Intel HWL
C Intel BWL
C Intel atom 18.8 this
C VIA nano
C The loop of this code is the result of running a code generation and
C optimisation tool suite written by David Harvey and Torbjorn Granlund.
define(`rp', `%rdi') C rcx
define(`up', `%rsi') C rdx
define(`n_param', `%rdx') C r8
define(`vp', `%rcx') C r9
define(`v0', `%r8')
define(`v1', `%r9')
define(`w0', `%rbx')
define(`w1', `%rcx')
define(`w2', `%rbp')
define(`w3', `%r10')
define(`n', `%r11')
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
ASM_START()
TEXT
ALIGN(16)
PROLOGUE(mpn_addmul_2)
FUNC_ENTRY(4)
push %rbx
push %rbp
mov (up), %rax
mov (vp), v0
mov 8(vp), v1
mov n_param, n
mul v0
test $1, R8(n)
jnz L(bx1)
L(bx0): test $2, R8(n)
jnz L(b10)
L(b00): mov %rax, w0
mov (up), %rax
mov %rdx, w1
xor R32(w2), R32(w2)
lea -8(rp), rp
jmp L(lo0)
L(b10): mov %rax, w2
mov (up), %rax
mov %rdx, w3
xor R32(w0), R32(w0)
lea -16(up), up
lea -24(rp), rp
jmp L(lo2)
L(bx1): test $2, R8(n)
jnz L(b11)
L(b01): mov %rax, w3
mov %rdx, w0
mov (up), %rax
xor R32(w1), R32(w1)
lea 8(up), up
dec n
jmp L(lo1)
L(b11): mov %rax, w1
mov (up), %rax
mov %rdx, w2
xor R32(w3), R32(w3)
lea -8(up), up
lea -16(rp), rp
jmp L(lo3)
ALIGN(16)
L(top):
L(lo1): mul v1
add w3, (rp)
mov $0, R32(w2)
adc %rax, w0
mov (up), %rax
adc %rdx, w1
mul v0
add %rax, w0
mov (up), %rax
adc %rdx, w1
adc $0, R32(w2)
L(lo0): mul v1
add w0, 8(rp)
adc %rax, w1
mov 8(up), %rax
mov $0, R32(w3)
adc %rdx, w2
mul v0
add %rax, w1
mov 8(up), %rax
adc %rdx, w2
adc $0, R32(w3)
L(lo3): mul v1
add w1, 16(rp)
adc %rax, w2
mov 16(up), %rax
mov $0, R32(w0)
adc %rdx, w3
mul v0
add %rax, w2
mov 16(up), %rax
adc %rdx, w3
adc $0, R32(w0)
L(lo2): mul v1
add w2, 24(rp)
adc %rax, w3
mov 24(up), %rax
adc %rdx, w0
mov $0, R32(w1)
lea 32(rp), rp
mul v0
lea 32(up), up
add %rax, w3
adc %rdx, w0
mov -8(up), %rax
adc $0, R32(w1)
sub $4, n
ja L(top)
L(end): mul v1
add w3, (rp)
adc %rax, w0
adc %rdx, w1
mov w0, 8(rp)
mov w1, %rax
pop %rbp
pop %rbx
FUNC_EXIT()
ret
EPILOGUE()

238
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dnl AMD64 mpn_addlsh1_n, mpn_rsblsh1_n optimised for Intel Atom.
dnl Used also for AMD bd1.
dnl Contributed to the GNU project by Torbjorn Granlund.
dnl Copyright 2011, 2012 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C TODO
C * This code is slightly large at 433 bytes.
C * sublsh1_n.asm and this file use the same basic pattern.
C cycles/limb
C AMD K8,K9 ?
C AMD K10 ?
C AMD bd1 2.3
C AMD bobcat ?
C Intel P4 ?
C Intel core2 ?
C Intel NHM ?
C Intel SBR ?
C Intel atom 4.875 (4.75 is probably possible)
C VIA nano ?
C INPUT PARAMETERS
define(`rp', `%rdi')
define(`up', `%rsi')
define(`vp', `%rdx')
define(`n', `%rcx')
define(`cy', `%r8')
ifdef(`OPERATION_addlsh1_n', `
define(ADDSUB, add)
define(ADCSBB, adc)
define(func_n, mpn_addlsh1_n)
define(func_nc, mpn_addlsh1_nc)')
ifdef(`OPERATION_rsblsh1_n', `
define(ADDSUB, sub)
define(ADCSBB, sbb)
define(func_n, mpn_rsblsh1_n)
define(func_nc, mpn_rsblsh1_nc)')
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
MULFUNC_PROLOGUE(mpn_addlsh1_n mpn_addlsh1_nc mpn_rsblsh1_n mpn_rsblsh1_nc)
ASM_START()
TEXT
ALIGN(16)
PROLOGUE(func_n)
FUNC_ENTRY(4)
push %rbp
xor R32(%rbp), R32(%rbp)
L(ent): mov R32(n), R32(%rax)
and $3, R32(%rax)
jz L(b0)
cmp $2, R32(%rax)
jz L(b2)
jg L(b3)
L(b1): mov (vp), %r8
add %r8, %r8
lea 8(vp), vp
sbb R32(%rax), R32(%rax) C save scy
add R32(%rbp), R32(%rbp) C restore acy
ADCSBB (up), %r8
mov %r8, (rp)
sbb R32(%rbp), R32(%rbp) C save acy
lea 8(up), up
lea 8(rp), rp
jmp L(b0)
L(b2): mov (vp), %r8
add %r8, %r8
mov 8(vp), %r9
adc %r9, %r9
lea 16(vp), vp
sbb R32(%rax), R32(%rax) C save scy
add R32(%rbp), R32(%rbp) C restore acy
ADCSBB (up), %r8
mov %r8, (rp)
ADCSBB 8(up), %r9
mov %r9, 8(rp)
sbb R32(%rbp), R32(%rbp) C save acy
lea 16(up), up
lea 16(rp), rp
jmp L(b0)
L(b3): mov (vp), %r8
add %r8, %r8
mov 8(vp), %r9
adc %r9, %r9
mov 16(vp), %r10
adc %r10, %r10
lea 24(vp), vp
sbb R32(%rax), R32(%rax) C save scy
add R32(%rbp), R32(%rbp) C restore acy
ADCSBB (up), %r8
mov %r8, (rp)
ADCSBB 8(up), %r9
mov %r9, 8(rp)
ADCSBB 16(up), %r10
mov %r10, 16(rp)
sbb R32(%rbp), R32(%rbp) C save acy
lea 24(up), up
lea 24(rp), rp
L(b0): test $4, R8(n)
jz L(skp)
add R32(%rax), R32(%rax) C restore scy
mov (vp), %r8
adc %r8, %r8
mov 8(vp), %r9
adc %r9, %r9
mov 16(vp), %r10
adc %r10, %r10
mov 24(vp), %r11
adc %r11, %r11
lea 32(vp), vp
sbb R32(%rax), R32(%rax) C save scy
add R32(%rbp), R32(%rbp) C restore acy
ADCSBB (up), %r8
mov %r8, (rp)
ADCSBB 8(up), %r9
mov %r9, 8(rp)
ADCSBB 16(up), %r10
mov %r10, 16(rp)
ADCSBB 24(up), %r11
mov %r11, 24(rp)
lea 32(up), up
lea 32(rp), rp
sbb R32(%rbp), R32(%rbp) C save acy
L(skp): cmp $8, n
jl L(rtn)
push %r12
push %r13
push %r14
push %rbx
lea -64(rp), rp
jmp L(x)
ALIGN(16)
L(top): add R32(%rax), R32(%rax) C restore scy
lea 64(rp), rp
mov (vp), %r8
adc %r8, %r8
mov 8(vp), %r9
adc %r9, %r9
mov 16(vp), %r10
adc %r10, %r10
mov 24(vp), %r11
adc %r11, %r11
mov 32(vp), %r12
adc %r12, %r12
mov 40(vp), %r13
adc %r13, %r13
mov 48(vp), %r14
adc %r14, %r14
mov 56(vp), %rbx
adc %rbx, %rbx
lea 64(vp), vp
sbb R32(%rax), R32(%rax) C save scy
add R32(%rbp), R32(%rbp) C restore acy
ADCSBB (up), %r8
mov %r8, (rp)
ADCSBB 8(up), %r9
mov %r9, 8(rp)
ADCSBB 16(up), %r10
mov %r10, 16(rp)
ADCSBB 24(up), %r11
mov %r11, 24(rp)
ADCSBB 32(up), %r12
mov %r12, 32(rp)
ADCSBB 40(up), %r13
mov %r13, 40(rp)
ADCSBB 48(up), %r14
mov %r14, 48(rp)
ADCSBB 56(up), %rbx
mov %rbx, 56(rp)
sbb R32(%rbp), R32(%rbp) C save acy
lea 64(up), up
L(x): sub $8, n
jge L(top)
L(end): pop %rbx
pop %r14
pop %r13
pop %r12
L(rtn):
ifdef(`OPERATION_addlsh1_n',`
add R32(%rbp), R32(%rax)
neg R32(%rax)')
ifdef(`OPERATION_rsblsh1_n',`
sub R32(%rax), R32(%rbp)
movslq R32(%rbp), %rax')
pop %rbp
FUNC_EXIT()
ret
EPILOGUE()
PROLOGUE(func_nc)
FUNC_ENTRY(4)
IFDOS(` mov 56(%rsp), %r8 ')
push %rbp
neg %r8 C set CF
sbb R32(%rbp), R32(%rbp) C save acy
jmp L(ent)
EPILOGUE()

191
blender-5.2.0/extern/gmp-source/mpn/x86_64/atom/aorrlsh2_n.asm vendored Normal file
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dnl AMD64 mpn_addlsh2_n -- rp[] = up[] + (vp[] << 2)
dnl AMD64 mpn_rsblsh2_n -- rp[] = (vp[] << 2) - up[]
dnl Optimised for Intel Atom.
dnl Contributed to the GNU project by Torbjorn Granlund.
dnl Copyright 2011, 2012 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/limb
C AMD K8,K9 ?
C AMD K10 ?
C Intel P4 ?
C Intel core2 ?
C Intel NHM ?
C Intel SBR ?
C Intel atom 5.75
C VIA nano ?
C INPUT PARAMETERS
define(`rp', `%rdi')
define(`up', `%rsi')
define(`vp', `%rdx')
define(`n', `%rcx')
define(`LSH', 2)
define(`RSH', 62)
define(M, eval(m4_lshift(1,LSH)))
ifdef(`OPERATION_addlsh2_n', `
define(ADDSUB, add)
define(ADCSBB, adc)
define(func_n, mpn_addlsh2_n)
define(func_nc, mpn_addlsh2_nc)')
ifdef(`OPERATION_rsblsh2_n', `
define(ADDSUB, sub)
define(ADCSBB, sbb)
define(func_n, mpn_rsblsh2_n)
define(func_nc, mpn_rsblsh2_nc)')
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
MULFUNC_PROLOGUE(mpn_addlsh2_n mpn_rsblsh2_n)
ASM_START()
TEXT
ALIGN(16)
PROLOGUE(func_n)
FUNC_ENTRY(4)
push %rbx
push %rbp
mov R32(n), R32(%rax)
and $3, R32(%rax)
jz L(b0) C we rely on rax = 0 at target
cmp $2, R32(%rax)
mov $0, R32(%rax)
jz L(b2)
jg L(b3)
L(b1): mov (vp), %r9
lea (%rax,%r9,M), %rbp
shr $RSH, %r9
sub $1, n
lea -8(up), up
lea -8(rp), rp
jz L(cj1)
mov 8(vp), %r10
lea (%r9,%r10,M), %r9
shr $RSH, %r10
mov 16(vp), %r11
lea 24(vp), vp
mov (vp), %r8
lea (%r10,%r11,M), %r10
shr $RSH, %r11
add R32(%rax), R32(%rax)
jmp L(L1)
L(b2): lea -32(rp), rp
mov (vp), %r8
lea -32(up), up
lea (%rax,%r8,M), %rbx
shr $RSH, %r8
mov 8(vp), %r9
sub $2, n
jle L(end)
jmp L(top)
L(b3): lea -24(up), up
mov (vp), %r11
lea -24(rp), rp
mov 8(vp), %r8
lea (%rax,%r11,M), %r10
shr $RSH, %r11
lea 8(vp), vp
lea (%r11,%r8,M), %rbx
add $1, n
jmp L(L3)
L(b0): lea -16(up), up
mov (vp), %r10
lea (%rax,%r10,M), %r9
shr $RSH, %r10
mov 8(vp), %r11
lea -16(rp), rp
mov 16(vp), %r8
lea (%r10,%r11,M), %r10
shr $RSH, %r11
add R32(%rax), R32(%rax)
lea 16(vp), vp
jmp L(L0)
ALIGN(16)
L(top): lea (%r8,%r9,M), %rbp
shr $RSH, %r9
lea 32(up), up
mov 16(vp), %r10
lea (%r9,%r10,M), %r9
shr $RSH, %r10
mov 24(vp), %r11
lea 32(rp), rp
lea 32(vp), vp
mov (vp), %r8
lea (%r10,%r11,M), %r10
shr $RSH, %r11
add R32(%rax), R32(%rax)
ADCSBB (up), %rbx
mov %rbx, (rp)
L(L1): ADCSBB 8(up), %rbp
mov %rbp, 8(rp)
L(L0): ADCSBB 16(up), %r9
lea (%r11,%r8,M), %rbx
mov %r9, 16(rp)
L(L3): ADCSBB 24(up), %r10
sbb R32(%rax), R32(%rax)
L(L2): shr $RSH, %r8
mov 8(vp), %r9
mov %r10, 24(rp)
sub $4, n
jg L(top)
L(end): lea (%r8,%r9,M), %rbp
shr $RSH, %r9
lea 32(up), up
lea 32(rp), rp
add R32(%rax), R32(%rax)
ADCSBB (up), %rbx
mov %rbx, (rp)
L(cj1): ADCSBB 8(up), %rbp
mov %rbp, 8(rp)
ifdef(`OPERATION_addlsh2_n',`
mov R32(n), R32(%rax) C zero rax
adc %r9, %rax')
ifdef(`OPERATION_rsblsh2_n',`
sbb n, %r9 C subtract 0
mov %r9, %rax')
pop %rbp
pop %rbx
FUNC_EXIT()
ret
EPILOGUE()

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dnl X86-64 mpn_add_n, mpn_sub_n, optimised for Intel Atom.
dnl Copyright 2011, 2017 Free Software Foundation, Inc.
dnl Contributed to the GNU project by Marco Bodrato. Ported to 64-bit by
dnl Torbjörn Granlund.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/limb
C AMD K8,K9 2
C AMD K10 2
C AMD bull 2.34\2.63
C AMD pile 2.27\2.52
C AMD steam
C AMD excavator
C AMD bobcat 2.79
C AMD jaguar 2.78
C Intel P4 11
C Intel core2 7.5
C Intel NHM 8.5
C Intel SBR 2.11
C Intel IBR 2.07
C Intel HWL 1.75
C Intel BWL 1.51
C Intel SKL 1.52
C Intel atom 3
C Intel SLM 4
C VIA nano
define(`rp', `%rdi') C rcx
define(`up', `%rsi') C rdx
define(`vp', `%rdx') C r8
define(`n', `%rcx') C r9
define(`cy', `%r8') C rsp+40 (mpn_add_nc and mpn_sub_nc)
ifdef(`OPERATION_add_n', `
define(ADCSBB, adc)
define(func_n, mpn_add_n)
define(func_nc, mpn_add_nc)')
ifdef(`OPERATION_sub_n', `
define(ADCSBB, sbb)
define(func_n, mpn_sub_n)
define(func_nc, mpn_sub_nc)')
MULFUNC_PROLOGUE(mpn_add_n mpn_add_nc mpn_sub_n mpn_sub_nc)
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
ASM_START()
TEXT
ALIGN(16)
PROLOGUE(func_n)
FUNC_ENTRY(4)
xor cy, cy C carry
L(com): shr n C n >> 1
jz L(1) C n == 1
jc L(1m2) C n % 2 == 1
L(0m2): shr cy
mov (up), %r10
lea 8(up), up
lea 8(vp), vp
lea -8(rp), rp
jmp L(mid)
L(1): shr cy
mov (up), %r9
jmp L(end)
L(1m2): shr cy
mov (up), %r9
ALIGN(16)
L(top): ADCSBB (vp), %r9
lea 16(up), up
mov -8(up), %r10
lea 16(vp), vp
mov %r9, (rp)
L(mid): ADCSBB -8(vp), %r10
lea 16(rp), rp
dec n
mov (up), %r9
mov %r10, -8(rp)
jnz L(top)
L(end): ADCSBB (vp), %r9
mov $0, R32(%rax)
mov %r9, (rp)
adc R32(%rax), R32(%rax)
FUNC_EXIT()
ret
EPILOGUE()
PROLOGUE(func_nc)
FUNC_ENTRY(4)
IFDOS(` mov 56(%rsp), cy ')
jmp L(com)
EPILOGUE()
ASM_END()

194
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dnl AMD64 mpn_addmul_1/mpn_submul_1 optimised for Intel Atom.
dnl Copyright 2003-2005, 2007, 2008, 2011-2013 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/limb
C AMD K8,K9 4.5
C AMD K10 4.5
C AMD bull 4.73
C AMD pile 4.60 4.80
C AMD steam
C AMD excavator
C AMD bobcat 5.48
C AMD jaguar 5.61
C Intel P4 16.6
C Intel core2 5.09
C Intel NHM 4.79
C Intel SBR 3.88
C Intel IBR 3.65
C Intel HWL 3.53
C Intel BWL 2.75
C Intel SKL 2.76
C Intel atom 19.4
C Intel SLM 8
C VIA nano
C The loop of this code is the result of running a code generation and
C optimisation tool suite written by David Harvey and Torbjorn Granlund.
define(`rp', `%rdi') C rcx
define(`up', `%rsi') C rdx
define(`n_param', `%rdx') C r8
define(`v0', `%rcx') C r9
define(`n', `%rbx')
ifdef(`OPERATION_addmul_1',`
define(`ADDSUB', `add')
define(`func', `mpn_addmul_1')
')
ifdef(`OPERATION_submul_1',`
define(`ADDSUB', `sub')
define(`func', `mpn_submul_1')
')
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
MULFUNC_PROLOGUE(mpn_addmul_1 mpn_submul_1)
ASM_START()
TEXT
ALIGN(16)
PROLOGUE(func)
FUNC_ENTRY(4)
push %rbx
mov (up), %rax
lea -8(up,n_param,8), up
lea -16(rp,n_param,8), rp
test $1, R8(n_param)
jnz L(bx1)
L(bx0): test $2, R8(n_param)
jnz L(b10)
L(b00): mov $1, R32(n)
sub n_param, n
mul v0
mov %rax, %r11
mov 8(up,n,8), %rax
mov %rdx, %r10
mul v0
mov %rax, %r8
mov 16(up,n,8), %rax
jmp L(lo0)
L(b10): mov $3, R32(n)
sub n_param, n
mul v0
mov %rax, %r11
mov -8(up,n,8), %rax
mov %rdx, %r10
mul v0
test n, n
jns L(cj2)
mov %rax, %r8
mov (up,n,8), %rax
mov %rdx, %r9
jmp L(lo2)
L(bx1): test $2, R8(n_param)
jnz L(b11)
L(b01): mov $2, R32(n)
sub n_param, n
mul v0
test n, n
jns L(cj1)
mov %rax, %r8
mov (up,n,8), %rax
mov %rdx, %r9
mul v0
mov %rax, %r11
mov 8(up,n,8), %rax
mov %rdx, %r10
jmp L(lo1)
L(b11): xor R32(n), R32(n)
sub n_param, n
mul v0
mov %rax, %r8
mov 16(up,n,8), %rax
mov %rdx, %r9
mul v0
mov %rax, %r11
mov 24(up,n,8), %rax
jmp L(lo3)
ALIGN(16)
L(top): mul v0
ADDSUB %r8, -16(rp,n,8)
mov %rax, %r8
mov (up,n,8), %rax
adc %r9, %r11
mov %rdx, %r9
adc $0, %r10
L(lo2): mul v0
ADDSUB %r11, -8(rp,n,8)
mov %rax, %r11
mov 8(up,n,8), %rax
adc %r10, %r8
mov %rdx, %r10
adc $0, %r9
L(lo1): mul v0
ADDSUB %r8, (rp,n,8)
mov %rax, %r8
adc %r9, %r11
mov 16(up,n,8), %rax
adc $0, %r10
L(lo0): mov %rdx, %r9
mul v0
ADDSUB %r11, 8(rp,n,8)
mov %rax, %r11
adc %r10, %r8
mov 24(up,n,8), %rax
adc $0, %r9
L(lo3): add $4, n
mov %rdx, %r10
js L(top)
L(end): mul v0
ADDSUB %r8, -16(rp,n,8)
adc %r9, %r11
adc $0, %r10
L(cj2): ADDSUB %r11, -8(rp,n,8)
adc %r10, %rax
adc $0, %rdx
L(cj1): ADDSUB %rax, (rp,n,8)
mov $0, R32(%rax)
adc %rdx, %rax
pop %rbx
FUNC_EXIT()
ret
EPILOGUE()
ASM_END()

38
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dnl X86-64 mpn_cnd_add_n.
dnl Copyright 2017 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
MULFUNC_PROLOGUE(mpn_cnd_add_n)
include_mpn(`x86_64/coreisbr/cnd_add_n.asm')

38
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dnl X86-64 mpn_cnd_sub_n.
dnl Copyright 2017 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
MULFUNC_PROLOGUE(mpn_cnd_sub_n)
include_mpn(`x86_64/coreisbr/cnd_sub_n.asm')

37
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dnl X86-64 mpn_com optimised for Intel Atom.
dnl Copyright 2012, 2013 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
MULFUNC_PROLOGUE(mpn_com)
include_mpn(`x86_64/fastsse/com-palignr.asm')

37
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dnl X86-64 mpn_copyd optimised for Intel Atom.
dnl Copyright 2012 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
MULFUNC_PROLOGUE(mpn_copyd)
include_mpn(`x86_64/fastsse/copyd-palignr.asm')

37
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@@ -0,0 +1,37 @@
dnl X86-64 mpn_copyi optimised for Intel Atom.
dnl Copyright 2012 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
MULFUNC_PROLOGUE(mpn_copyi)
include_mpn(`x86_64/fastsse/copyi-palignr.asm')

37
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dnl AMD64 mpn_divexact_1 -- mpn by limb exact division.
dnl Copyright 2011, 2012 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
MULFUNC_PROLOGUE(mpn_divexact_1)
include_mpn(`x86_64/nano/dive_1.asm')

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/* Intel Atom/64 gmp-mparam.h -- Compiler/machine parameter header file.
Copyright 2019 Free Software Foundation, Inc.
This file is part of the GNU MP Library.
The GNU MP Library is free software; you can redistribute it and/or modify
it under the terms of either:
* the GNU Lesser General Public License as published by the Free
Software Foundation; either version 3 of the License, or (at your
option) any later version.
or
* the GNU General Public License as published by the Free Software
Foundation; either version 2 of the License, or (at your option) any
later version.
or both in parallel, as here.
The GNU MP Library is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
for more details.
You should have received copies of the GNU General Public License and the
GNU Lesser General Public License along with the GNU MP Library. If not,
see https://www.gnu.org/licenses/. */
#define GMP_LIMB_BITS 64
#define GMP_LIMB_BYTES 8
#define SHLD_SLOW 1
#define SHRD_SLOW 1
/* 1600 MHz Diamondville (Atom 330) */
/* FFT tuning limit = 50,646,641 */
/* Generated by tuneup.c, 2019-10-16, gcc 8.3 */
#define MOD_1_NORM_THRESHOLD 0 /* always */
#define MOD_1_UNNORM_THRESHOLD 0 /* always */
#define MOD_1N_TO_MOD_1_1_THRESHOLD 5
#define MOD_1U_TO_MOD_1_1_THRESHOLD 3
#define MOD_1_1_TO_MOD_1_2_THRESHOLD MP_SIZE_T_MAX
#define MOD_1_2_TO_MOD_1_4_THRESHOLD 0 /* never mpn_mod_1s_2p */
#define PREINV_MOD_1_TO_MOD_1_THRESHOLD 12
#define USE_PREINV_DIVREM_1 1 /* native */
#define DIV_QR_1_NORM_THRESHOLD 1
#define DIV_QR_1_UNNORM_THRESHOLD MP_SIZE_T_MAX /* never */
#define DIV_QR_2_PI2_THRESHOLD MP_SIZE_T_MAX /* never */
#define DIVEXACT_1_THRESHOLD 0 /* always (native) */
#define BMOD_1_TO_MOD_1_THRESHOLD 16
#define DIV_1_VS_MUL_1_PERCENT 201
#define MUL_TOOM22_THRESHOLD 12
#define MUL_TOOM33_THRESHOLD 74
#define MUL_TOOM44_THRESHOLD 106
#define MUL_TOOM6H_THRESHOLD 155
#define MUL_TOOM8H_THRESHOLD 212
#define MUL_TOOM32_TO_TOOM43_THRESHOLD 73
#define MUL_TOOM32_TO_TOOM53_THRESHOLD 77
#define MUL_TOOM42_TO_TOOM53_THRESHOLD 73
#define MUL_TOOM42_TO_TOOM63_THRESHOLD 72
#define MUL_TOOM43_TO_TOOM54_THRESHOLD 58
#define SQR_BASECASE_THRESHOLD 5
#define SQR_TOOM2_THRESHOLD 22
#define SQR_TOOM3_THRESHOLD 73
#define SQR_TOOM4_THRESHOLD 130
#define SQR_TOOM6_THRESHOLD 159
#define SQR_TOOM8_THRESHOLD 236
#define MULMID_TOOM42_THRESHOLD 16
#define MULMOD_BNM1_THRESHOLD 9
#define SQRMOD_BNM1_THRESHOLD 9
#define MUL_FFT_MODF_THRESHOLD 220 /* k = 5 */
#define MUL_FFT_TABLE3 \
{ { 220, 5}, { 11, 6}, { 6, 5}, { 13, 6}, \
{ 13, 7}, { 7, 6}, { 15, 7}, { 8, 6}, \
{ 17, 7}, { 13, 8}, { 7, 7}, { 17, 8}, \
{ 9, 7}, { 19, 8}, { 11, 7}, { 23, 8}, \
{ 13, 9}, { 7, 8}, { 19, 9}, { 11, 8}, \
{ 25,10}, { 7, 9}, { 15, 8}, { 33, 9}, \
{ 19, 8}, { 39, 9}, { 23, 8}, { 47, 9}, \
{ 27,10}, { 15, 9}, { 39,10}, { 23, 9}, \
{ 47,11}, { 15,10}, { 31, 9}, { 67,10}, \
{ 39, 9}, { 79,10}, { 47, 9}, { 95,11}, \
{ 31,10}, { 63, 9}, { 127, 8}, { 255,10}, \
{ 71, 9}, { 143, 8}, { 287,10}, { 79,11}, \
{ 47,10}, { 95, 9}, { 191,12}, { 31,11}, \
{ 63,10}, { 127, 9}, { 255, 8}, { 511,10}, \
{ 143, 9}, { 287,11}, { 79,10}, { 159, 9}, \
{ 319,10}, { 175, 9}, { 351,11}, { 95,10}, \
{ 191, 9}, { 383,10}, { 207,11}, { 111,10}, \
{ 223,12}, { 63,11}, { 127,10}, { 255, 9}, \
{ 511,11}, { 143,10}, { 287, 9}, { 575,11}, \
{ 159,10}, { 319,11}, { 175,10}, { 351,12}, \
{ 95,11}, { 191,10}, { 383,11}, { 207,10}, \
{ 415,11}, { 223,13}, { 63,12}, { 127,11}, \
{ 255,10}, { 511,11}, { 287,10}, { 575,12}, \
{ 159,11}, { 319,10}, { 639,11}, { 351,12}, \
{ 191,11}, { 383,10}, { 767,12}, { 223,11}, \
{ 447,13}, { 127,12}, { 255,11}, { 511,12}, \
{ 287,11}, { 575,12}, { 319,11}, { 639,12}, \
{ 351,13}, { 191,12}, { 383,11}, { 767,12}, \
{ 447,14}, { 127,13}, { 255,12}, { 575,13}, \
{ 319,12}, { 703,13}, { 383,12}, { 767,13}, \
{ 447,14}, { 255,13}, { 511,12}, { 1023,13}, \
{ 575,12}, { 1151,13}, { 703,14}, { 383,13}, \
{ 831,12}, { 1663,15}, { 255,14}, { 511,13}, \
{ 1087,12}, { 2175,13}, { 1151,14}, { 639,13}, \
{ 1407,12}, { 2815,14}, { 767,13}, { 1663,14}, \
{ 895,13}, { 1791,15}, { 511,14}, { 1023,13}, \
{ 2175,14}, { 1151,13}, { 2431,12}, { 4863,14}, \
{ 1407,13}, { 2815,15}, { 767,14}, { 1791,16}, \
{ 511,15}, { 1023,14}, { 2431,13}, { 4863,15}, \
{ 1279,14}, { 2943,15}, { 1535,14}, { 16384,15}, \
{ 32768,16}, { 65536,17}, { 131072,18}, { 262144,19}, \
{ 524288,20}, {1048576,21}, {2097152,22}, {4194304,23}, \
{8388608,24} }
#define MUL_FFT_TABLE3_SIZE 169
#define MUL_FFT_THRESHOLD 2240
#define SQR_FFT_MODF_THRESHOLD 184 /* k = 5 */
#define SQR_FFT_TABLE3 \
{ { 184, 5}, { 11, 6}, { 13, 7}, { 7, 6}, \
{ 15, 7}, { 8, 6}, { 17, 7}, { 13, 8}, \
{ 7, 7}, { 17, 8}, { 9, 7}, { 19, 8}, \
{ 11, 7}, { 23, 8}, { 13, 9}, { 7, 8}, \
{ 19, 9}, { 11, 8}, { 25,10}, { 7, 9}, \
{ 15, 8}, { 33, 9}, { 19, 8}, { 39, 9}, \
{ 23,10}, { 15, 9}, { 39,10}, { 23, 9}, \
{ 47,11}, { 15,10}, { 31, 9}, { 63, 8}, \
{ 127, 7}, { 255,10}, { 39, 8}, { 159,10}, \
{ 47, 9}, { 95, 8}, { 191,11}, { 31,10}, \
{ 63, 9}, { 127, 8}, { 255, 7}, { 511,10}, \
{ 71, 9}, { 143, 8}, { 287, 7}, { 575, 9}, \
{ 159, 8}, { 319,11}, { 47,10}, { 95, 9}, \
{ 191, 8}, { 383,12}, { 31,11}, { 63,10}, \
{ 127, 9}, { 255, 8}, { 511,10}, { 143, 9}, \
{ 287, 8}, { 575,10}, { 159, 9}, { 319, 8}, \
{ 639,10}, { 175, 9}, { 351,11}, { 95,10}, \
{ 191, 9}, { 383,11}, { 111,10}, { 223, 9}, \
{ 447,12}, { 63,11}, { 127,10}, { 255, 9}, \
{ 511,11}, { 143,10}, { 287, 9}, { 575,11}, \
{ 159,10}, { 319, 9}, { 639,11}, { 175,10}, \
{ 351,12}, { 95,11}, { 191,10}, { 383, 9}, \
{ 767,11}, { 223,10}, { 447,13}, { 63,12}, \
{ 127,11}, { 255,10}, { 511,11}, { 287,10}, \
{ 575,12}, { 159,11}, { 319,10}, { 639,11}, \
{ 351,12}, { 191,11}, { 383,10}, { 767,12}, \
{ 223,11}, { 447,13}, { 127,12}, { 255,11}, \
{ 511,12}, { 287,11}, { 575,12}, { 319,11}, \
{ 639,12}, { 351,13}, { 191,12}, { 383,11}, \
{ 767,12}, { 447,14}, { 127,13}, { 255,12}, \
{ 575,13}, { 319,12}, { 703,13}, { 383,12}, \
{ 767,13}, { 447,14}, { 255,13}, { 511,12}, \
{ 1023,13}, { 575,12}, { 1151,13}, { 703,14}, \
{ 383,13}, { 831,12}, { 1663,15}, { 255,14}, \
{ 511,13}, { 1151,14}, { 639,13}, { 1407,12}, \
{ 2815,14}, { 767,13}, { 1663,14}, { 895,13}, \
{ 1791,15}, { 511,14}, { 1023,13}, { 2047,14}, \
{ 1151,13}, { 2431,12}, { 4863,14}, { 1407,13}, \
{ 2815,15}, { 767,14}, { 1791,16}, { 511,15}, \
{ 1023,14}, { 2431,13}, { 4863,15}, { 1279,14}, \
{ 2943,15}, { 1535,14}, { 16384,15}, { 32768,16}, \
{ 65536,17}, { 131072,18}, { 262144,19}, { 524288,20}, \
{1048576,21}, {2097152,22}, {4194304,23}, {8388608,24} }
#define SQR_FFT_TABLE3_SIZE 172
#define SQR_FFT_THRESHOLD 1728
#define MULLO_BASECASE_THRESHOLD 0 /* always */
#define MULLO_DC_THRESHOLD 33
#define MULLO_MUL_N_THRESHOLD 4392
#define SQRLO_BASECASE_THRESHOLD 0 /* always */
#define SQRLO_DC_THRESHOLD 85
#define SQRLO_SQR_THRESHOLD 3176
#define DC_DIV_QR_THRESHOLD 34
#define DC_DIVAPPR_Q_THRESHOLD 119
#define DC_BDIV_QR_THRESHOLD 31
#define DC_BDIV_Q_THRESHOLD 76
#define INV_MULMOD_BNM1_THRESHOLD 22
#define INV_NEWTON_THRESHOLD 149
#define INV_APPR_THRESHOLD 123
#define BINV_NEWTON_THRESHOLD 179
#define REDC_1_TO_REDC_2_THRESHOLD 24
#define REDC_2_TO_REDC_N_THRESHOLD 39
#define MU_DIV_QR_THRESHOLD 807
#define MU_DIVAPPR_Q_THRESHOLD 807
#define MUPI_DIV_QR_THRESHOLD 77
#define MU_BDIV_QR_THRESHOLD 748
#define MU_BDIV_Q_THRESHOLD 807
#define POWM_SEC_TABLE 1,22,114,326,1486
#define GET_STR_DC_THRESHOLD 16
#define GET_STR_PRECOMPUTE_THRESHOLD 30
#define SET_STR_DC_THRESHOLD 381
#define SET_STR_PRECOMPUTE_THRESHOLD 1565
#define FAC_DSC_THRESHOLD 960
#define FAC_ODD_THRESHOLD 0 /* always */
#define MATRIX22_STRASSEN_THRESHOLD 13
#define HGCD2_DIV1_METHOD 3 /* 5.86% faster than 4 */
#define HGCD_THRESHOLD 88
#define HGCD_APPR_THRESHOLD 88
#define HGCD_REDUCE_THRESHOLD 1182
#define GCD_DC_THRESHOLD 241
#define GCDEXT_DC_THRESHOLD 192
#define JACOBI_BASE_METHOD 3 /* 9.43% faster than 2 */
/* Tuneup completed successfully, took 193098 seconds */

123
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dnl AMD64 mpn_lshift -- mpn left shift, optimised for Atom.
dnl Contributed to the GNU project by Torbjorn Granlund.
dnl Copyright 2011, 2012 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/limb
C AMD K8,K9 ?
C AMD K10 ?
C Intel P4 ?
C Intel core2 ?
C Intel NHM ?
C Intel SBR ?
C Intel atom 4.5
C VIA nano ?
C TODO
C * Consider using 4-way unrolling. We reach 4 c/l, but the code is 2.5 times
C larger.
C INPUT PARAMETERS
define(`rp', `%rdi')
define(`up', `%rsi')
define(`n', `%rdx')
define(`cnt', `%rcx')
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
ASM_START()
TEXT
ALIGN(16)
PROLOGUE(mpn_lshift)
FUNC_ENTRY(4)
lea -8(up,n,8), up
lea -8(rp,n,8), rp
shr R32(n)
mov (up), %rax
jnc L(evn)
mov %rax, %r11
shl R8(%rcx), %r11
neg R8(%rcx)
shr R8(%rcx), %rax
test n, n
jnz L(gt1)
mov %r11, (rp)
FUNC_EXIT()
ret
L(gt1): mov -8(up), %r8
mov %r8, %r10
shr R8(%rcx), %r8
jmp L(lo1)
L(evn): mov %rax, %r10
neg R8(%rcx)
shr R8(%rcx), %rax
mov -8(up), %r9
mov %r9, %r11
shr R8(%rcx), %r9
neg R8(%rcx)
dec n
lea 8(rp), rp
lea -8(up), up
jz L(end)
ALIGN(8)
L(top): shl R8(%rcx), %r10
or %r10, %r9
shl R8(%rcx), %r11
neg R8(%rcx)
mov -8(up), %r8
mov %r8, %r10
mov %r9, -8(rp)
shr R8(%rcx), %r8
lea -16(rp), rp
L(lo1): mov -16(up), %r9
or %r11, %r8
mov %r9, %r11
shr R8(%rcx), %r9
lea -16(up), up
neg R8(%rcx)
mov %r8, (rp)
dec n
jg L(top)
L(end): shl R8(%rcx), %r10
or %r10, %r9
shl R8(%rcx), %r11
mov %r9, -8(rp)
mov %r11, -16(rp)
FUNC_EXIT()
ret
EPILOGUE()

127
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dnl AMD64 mpn_lshiftc -- mpn left shift with complement, optimised for Atom.
dnl Contributed to the GNU project by Torbjorn Granlund.
dnl Copyright 2011, 2012 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/limb
C AMD K8,K9 ?
C AMD K10 ?
C Intel P4 ?
C Intel core2 ?
C Intel NHM ?
C Intel SBR ?
C Intel atom 5
C VIA nano ?
C TODO
C * Consider using 4-way unrolling. We reach 4.5 c/l, but the code is 2.5
C times larger.
C INPUT PARAMETERS
define(`rp', `%rdi')
define(`up', `%rsi')
define(`n', `%rdx')
define(`cnt', `%rcx')
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
ASM_START()
TEXT
ALIGN(16)
PROLOGUE(mpn_lshiftc)
FUNC_ENTRY(4)
lea -8(up,n,8), up
lea -8(rp,n,8), rp
shr R32(n)
mov (up), %rax
jnc L(evn)
mov %rax, %r11
shl R8(%rcx), %r11
neg R8(%rcx)
shr R8(%rcx), %rax
test n, n
jnz L(gt1)
not %r11
mov %r11, (rp)
FUNC_EXIT()
ret
L(gt1): mov -8(up), %r8
mov %r8, %r10
shr R8(%rcx), %r8
jmp L(lo1)
L(evn): mov %rax, %r10
neg R8(%rcx)
shr R8(%rcx), %rax
mov -8(up), %r9
mov %r9, %r11
shr R8(%rcx), %r9
neg R8(%rcx)
lea 8(rp), rp
lea -8(up), up
jmp L(lo0)
C ALIGN(16)
L(top): shl R8(%rcx), %r10
or %r10, %r9
shl R8(%rcx), %r11
not %r9
neg R8(%rcx)
mov -8(up), %r8
lea -16(rp), rp
mov %r8, %r10
shr R8(%rcx), %r8
mov %r9, 8(rp)
L(lo1): or %r11, %r8
mov -16(up), %r9
mov %r9, %r11
shr R8(%rcx), %r9
lea -16(up), up
neg R8(%rcx)
not %r8
mov %r8, (rp)
L(lo0): dec n
jg L(top)
L(end): shl R8(%rcx), %r10
or %r10, %r9
not %r9
shl R8(%rcx), %r11
not %r11
mov %r9, -8(rp)
mov %r11, -16(rp)
FUNC_EXIT()
ret
EPILOGUE()

147
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dnl AMD64 mpn_mul_1 optimised for Intel Atom.
dnl Copyright 2003-2005, 2007, 2008, 2012, 2013 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/limb
C AMD K8,K9 3.03
C AMD K10 3.03
C AMD bull 4.74
C AMD pile 4.56
C AMD steam
C AMD excavator
C AMD bobcat 5.56 6.04
C AMD jaguar 5.55 5.84
C Intel P4 13.05
C Intel core2 4.03
C Intel NHM 3.80
C Intel SBR 2.75
C Intel IBR 2.69
C Intel HWL 2.50
C Intel BWL 2.55
C Intel SKL 2.57
C Intel atom 17.3
C Intel SLM 14.7
C VIA nano
C The loop of this code is the result of running a code generation and
C optimisation tool suite written by David Harvey and Torbjorn Granlund.
define(`rp', `%rdi') C rcx
define(`up', `%rsi') C rdx
define(`n_param', `%rdx') C r8
define(`v0', `%rcx') C r9
define(`n', `%r11')
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
ASM_START()
TEXT
ALIGN(16)
PROLOGUE(mpn_mul_1)
FUNC_ENTRY(4)
xor %r8, %r8
L(com): mov (up), %rax
lea -16(up,n_param,8), up
lea -8(rp,n_param,8), rp
test $1, R8(n_param)
jnz L(bx1)
L(bx0): mov %r8, %r9
test $2, R8(n_param)
jnz L(b10)
L(b00): mov $2, R32(n)
sub n_param, n
jmp L(lo0)
L(bx1): test $2, R8(n_param)
jnz L(b11)
L(b01): mov $3, R32(n)
sub n_param, n
mul v0
cmp $2, n
jnz L(lo1)
jmp L(cj1)
L(b11): mov $1, R32(n)
sub n_param, n
jmp L(lo3)
L(b10): xor R32(n), R32(n)
sub n_param, n
jmp L(lo2)
L(top): mul v0
mov %r9, -24(rp,n,8)
L(lo1): xor %r9d, %r9d
add %rax, %r8
mov (up,n,8), %rax
adc %rdx, %r9
mov %r8, -16(rp,n,8)
L(lo0): xor %r8d, %r8d
mul v0
add %rax, %r9
mov 8(up,n,8), %rax
adc %rdx, %r8
mov %r9, -8(rp,n,8)
L(lo3): xor %r9d, %r9d
mul v0
add %rax, %r8
mov 16(up,n,8), %rax
adc %rdx, %r9
mov %r8, (rp,n,8)
L(lo2): xor %r8d, %r8d
mul v0
add %rax, %r9
mov 24(up,n,8), %rax
adc %rdx, %r8
add $4, n
js L(top)
L(end): mul v0
mov %r9, -8(rp)
L(cj1): add %rax, %r8
mov $0, R32(%rax)
adc %rdx, %rax
mov %r8, (rp)
FUNC_EXIT()
ret
EPILOGUE()
PROLOGUE(mpn_mul_1c)
FUNC_ENTRY(4)
IFDOS(` mov 56(%rsp), %r8 ')
jmp L(com)
EPILOGUE()
ASM_END()

190
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dnl AMD64 mpn_mul_2 optimised for Intel Atom.
dnl Copyright 2008, 2011-2013 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/limb best
C AMD K8,K9 5.78
C AMD K10 5.78
C AMD bull 9.10
C AMD pile 9.17
C AMD steam
C AMD excavator
C AMD bobcat 11.3
C AMD jaguar 10.9
C Intel P4 24.6
C Intel core2 8.06
C Intel NHM 7.65
C Intel SBR 6.28
C Intel IBR 6.10
C Intel HWL 6.09
C Intel BWL 4.73
C Intel SKL 4.77
C Intel atom 35.3
C Intel SLM 25.6
C VIA nano
C The loop of this code is the result of running a code generation and
C optimisation tool suite written by David Harvey and Torbjorn Granlund.
define(`rp', `%rdi') C rcx
define(`up', `%rsi') C rdx
define(`n_param', `%rdx') C r8
define(`vp', `%rcx') C r9
define(`v0', `%r8')
define(`v1', `%r9')
define(`w0', `%rbx')
define(`w1', `%rcx')
define(`w2', `%rbp')
define(`w3', `%r10')
define(`n', `%r11')
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
ASM_START()
TEXT
ALIGN(16)
PROLOGUE(mpn_mul_2)
FUNC_ENTRY(4)
push %rbx
push %rbp
mov (up), %rax
mov (vp), v0
mov 8(vp), v1
mov n_param, n
mul v0
test $1, R8(n)
jnz L(bx1)
L(bx0): test $2, R8(n)
jnz L(b10)
L(b00): mov %rax, w0
mov (up), %rax
mov %rdx, w1
xor R32(w2), R32(w2)
lea -8(rp), rp
jmp L(lo0)
L(b10): mov %rax, w2
mov (up), %rax
mov %rdx, w3
xor R32(w0), R32(w0)
lea -16(up), up
lea -24(rp), rp
jmp L(lo2)
L(bx1): test $2, R8(n)
jnz L(b11)
L(b01): mov %rax, w3
mov %rdx, w0
mov (up), %rax
xor R32(w1), R32(w1)
lea 8(up), up
dec n
jmp L(lo1)
L(b11): mov %rax, w1
mov (up), %rax
mov %rdx, w2
xor R32(w3), R32(w3)
lea -8(up), up
lea -16(rp), rp
jmp L(lo3)
ALIGN(16)
L(top):
L(lo1): mul v1
add %rax, w0
mov (up), %rax
mov $0, R32(w2)
mov w3, (rp)
adc %rdx, w1
mul v0
add %rax, w0
mov (up), %rax
adc %rdx, w1
adc $0, R32(w2)
L(lo0): mul v1
add %rax, w1
mov 8(up), %rax
mov w0, 8(rp)
adc %rdx, w2
mul v0
add %rax, w1
mov 8(up), %rax
adc %rdx, w2
mov $0, R32(w3)
adc $0, R32(w3)
L(lo3): mul v1
add %rax, w2
mov 16(up), %rax
mov w1, 16(rp)
mov $0, R32(w0)
adc %rdx, w3
mul v0
add %rax, w2
mov 16(up), %rax
adc %rdx, w3
L(lo2): mov $0, R32(w1)
mov w2, 24(rp)
adc $0, R32(w0)
mul v1
add %rax, w3
mov 24(up), %rax
lea 32(up), up
adc %rdx, w0
mul v0
lea 32(rp), rp
add %rax, w3
adc %rdx, w0
mov -8(up), %rax
adc $0, R32(w1)
sub $4, n
ja L(top)
L(end): mul v1
mov w3, (rp)
add %rax, w0
adc %rdx, w1
mov w0, 8(rp)
mov w1, %rax
pop %rbp
pop %rbx
FUNC_EXIT()
ret
EPILOGUE()

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dnl x86-64 mpn_popcount.
dnl Copyright 2007, 2011 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
MULFUNC_PROLOGUE(mpn_popcount)
include_mpn(`x86/pentium4/sse2/popcount.asm')

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dnl X86-64 mpn_redc_1 optimised for Intel Atom.
dnl Contributed to the GNU project by Torbjörn Granlund.
dnl Copyright 2003-2005, 2007, 2008, 2011-2013 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/limb
C AMD K8,K9 ?
C AMD K10 ?
C AMD bull ?
C AMD pile ?
C AMD steam ?
C AMD bobcat 5.0
C AMD jaguar ?
C Intel P4 ?
C Intel core ?
C Intel NHM ?
C Intel SBR ?
C Intel IBR ?
C Intel HWL ?
C Intel BWL ?
C Intel atom ?
C VIA nano ?
C TODO
C * Micro-optimise, none performed thus far.
C * Consider inlining mpn_add_n.
C * Single basecases out before the pushes.
C * Make lead-in code for the inner loops be more similar.
C When playing with pointers, set this to $2 to fall back to conservative
C indexing in wind-down code.
define(`I',`$1')
define(`rp', `%rdi') C rcx
define(`up', `%rsi') C rdx
define(`mp_param', `%rdx') C r8
define(`n', `%rcx') C r9
define(`u0inv', `%r8') C stack
define(`i', `%r14')
define(`j', `%r15')
define(`mp', `%r12')
define(`q0', `%r13')
define(`w0', `%rbp')
define(`w1', `%r9')
define(`w2', `%r10')
define(`w3', `%r11')
C rax rbx rcx rdx rdi rsi rbp r8 r9 r10 r11 r12 r13 r14 r15
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
define(`ALIGNx', `ALIGN(16)')
ASM_START()
TEXT
ALIGN(32)
PROLOGUE(mpn_redc_1)
FUNC_ENTRY(4)
IFDOS(` mov 56(%rsp), %r8 ')
push %rbx
push %rbp
push %r12
push %r13
push %r14
push %r15
mov (up), q0
mov n, j C outer loop induction var
lea (mp_param,n,8), mp
lea (up,n,8), up
neg n
imul u0inv, q0 C first iteration q0
test $1, R8(n)
jz L(bx0)
L(bx1): test $2, R8(n)
jz L(b3)
L(b1): cmp $-1, R32(n)
jz L(n1)
L(otp1):lea 1(n), i
mov (mp,n,8), %rax
mul q0
mov %rax, %rbp
mov 8(mp,n,8), %rax
mov %rdx, %r9
mul q0
mov %rax, %rbx
mov 16(mp,n,8), %rax
mov %rdx, %r10
mul q0
add (up,n,8), %rbp
mov %rax, %rbp
adc %r9, %rbx
mov 24(mp,n,8), %rax
adc $0, %r10
mov %rdx, %r9
mul q0
add 8(up,n,8), %rbx
mov %rbx, 8(up,n,8)
mov %rax, %r11
adc %r10, %rbp
mov 32(mp,n,8), %rax
adc $0, %r9
imul u0inv, %rbx C next q limb
jmp L(e1)
ALIGNx
L(tp1): mul q0
add %rbp, -24(up,i,8)
mov %rax, %rbp
mov (mp,i,8), %rax
adc %r9, %r11
mov %rdx, %r9
adc $0, %r10
mul q0
add %r11, -16(up,i,8)
mov %rax, %r11
mov 8(mp,i,8), %rax
adc %r10, %rbp
mov %rdx, %r10
adc $0, %r9
mul q0
add %rbp, -8(up,i,8)
mov %rax, %rbp
adc %r9, %r11
mov 16(mp,i,8), %rax
adc $0, %r10
mov %rdx, %r9
mul q0
add %r11, (up,i,8)
mov %rax, %r11
adc %r10, %rbp
mov 24(mp,i,8), %rax
adc $0, %r9
L(e1): add $4, i
mov %rdx, %r10
js L(tp1)
L(ed1): mul q0
add %rbp, I(-24(up),-24(up,i,8))
adc %r9, %r11
adc $0, %r10
add %r11, I(-16(up),-16(up,i,8))
adc %r10, %rax
adc $0, %rdx
add %rax, I(-8(up),-8(up,i,8))
adc $0, %rdx
mov %rdx, (up,n,8) C up[0]
mov %rbx, q0 C previously computed q limb -> q0
lea 8(up), up C up++
dec j
jnz L(otp1)
jmp L(cj)
L(b3): cmp $-3, R32(n)
jz L(n3)
L(otp3):lea 3(n), i
mov (mp,n,8), %rax
mul q0
mov %rax, %rbp
mov 8(mp,n,8), %rax
mov %rdx, %r9
mul q0
mov %rax, %rbx
mov 16(mp,n,8), %rax
mov %rdx, %r10
mul q0
add (up,n,8), %rbp
mov %rax, %rbp
mov 24(mp,n,8), %rax
adc %r9, %rbx
mov %rdx, %r9
adc $0, %r10
mul q0
add 8(up,n,8), %rbx
mov %rbx, 8(up,n,8)
mov %rax, %r11
mov 32(mp,n,8), %rax
adc %r10, %rbp
mov %rdx, %r10
adc $0, %r9
imul u0inv, %rbx C next q limb
jmp L(e3)
ALIGNx
L(tp3): mul q0
add %rbp, -24(up,i,8)
mov %rax, %rbp
mov (mp,i,8), %rax
adc %r9, %r11
mov %rdx, %r9
adc $0, %r10
mul q0
add %r11, -16(up,i,8)
mov %rax, %r11
mov 8(mp,i,8), %rax
adc %r10, %rbp
mov %rdx, %r10
adc $0, %r9
L(e3): mul q0
add %rbp, -8(up,i,8)
mov %rax, %rbp
adc %r9, %r11
mov 16(mp,i,8), %rax
adc $0, %r10
mov %rdx, %r9
mul q0
add %r11, (up,i,8)
mov %rax, %r11
adc %r10, %rbp
mov 24(mp,i,8), %rax
adc $0, %r9
add $4, i
mov %rdx, %r10
js L(tp3)
L(ed3): mul q0
add %rbp, I(-24(up),-24(up,i,8))
adc %r9, %r11
adc $0, %r10
add %r11, I(-16(up),-16(up,i,8))
adc %r10, %rax
adc $0, %rdx
add %rax, I(-8(up),-8(up,i,8))
adc $0, %rdx
mov %rdx, (up,n,8) C up[0]
mov %rbx, q0 C previously computed q limb -> q0
lea 8(up), up C up++
dec j
jnz L(otp3)
C jmp L(cj)
L(cj):
IFSTD(` lea (up,n,8), up C param 2: up
lea (up,n,8), %rdx C param 3: up - n
neg R32(n) ') C param 4: n
IFDOS(` lea (up,n,8), %rdx C param 2: up
lea (%rdx,n,8), %r8 C param 3: up - n
neg R32(n)
mov n, %r9 C param 4: n
mov rp, %rcx ') C param 1: rp
IFSTD(` sub $8, %rsp ')
IFDOS(` sub $40, %rsp ')
ASSERT(nz, `test $15, %rsp')
CALL( mpn_add_n)
IFSTD(` add $8, %rsp ')
IFDOS(` add $40, %rsp ')
L(ret): pop %r15
pop %r14
pop %r13
pop %r12
pop %rbp
pop %rbx
FUNC_EXIT()
ret
L(bx0): test $2, R8(n)
jnz L(b2)
L(b0): cmp $-4, R32(n)
jz L(n4)
L(otp0):lea 4(n), i
mov (mp,n,8), %rax
mul q0
mov %rax, %r11
mov 8(mp,n,8), %rax
mov %rdx, %r10
mul q0
mov %rax, %rbx
mov 16(mp,n,8), %rax
mov %rdx, %r9
mul q0
add (up,n,8), %r11
mov %rax, %r11
adc %r10, %rbx
mov 24(mp,n,8), %rax
adc $0, %r9
mov %rdx, %r10
mul q0
add 8(up,n,8), %rbx
mov %rbx, 8(up,n,8)
mov %rax, %rbp
mov 32(mp,n,8), %rax
adc %r9, %r11
mov %rdx, %r9
adc $0, %r10
imul u0inv, %rbx C next q limb
jmp L(e0)
ALIGNx
L(tp0): mul q0
add %rbp, -24(up,i,8)
mov %rax, %rbp
mov (mp,i,8), %rax
adc %r9, %r11
mov %rdx, %r9
adc $0, %r10
L(e0): mul q0
add %r11, -16(up,i,8)
mov %rax, %r11
mov 8(mp,i,8), %rax
adc %r10, %rbp
mov %rdx, %r10
adc $0, %r9
mul q0
add %rbp, -8(up,i,8)
mov %rax, %rbp
adc %r9, %r11
mov 16(mp,i,8), %rax
adc $0, %r10
mov %rdx, %r9
mul q0
add %r11, (up,i,8)
mov %rax, %r11
adc %r10, %rbp
mov 24(mp,i,8), %rax
adc $0, %r9
add $4, i
mov %rdx, %r10
js L(tp0)
L(ed0): mul q0
add %rbp, I(-24(up),-24(up,i,8))
adc %r9, %r11
adc $0, %r10
add %r11, I(-16(up),-16(up,i,8))
adc %r10, %rax
adc $0, %rdx
add %rax, I(-8(up),-8(up,i,8))
adc $0, %rdx
mov %rdx, (up,n,8) C up[0]
mov %rbx, q0 C previously computed q limb -> q0
lea 8(up), up C up++
dec j
jnz L(otp0)
jmp L(cj)
L(b2): cmp $-2, R32(n)
jz L(n2)
L(otp2):lea 2(n), i
mov (mp,n,8), %rax
mul q0
mov %rax, %r11
mov 8(mp,n,8), %rax
mov %rdx, %r10
mul q0
mov %rax, %rbx
mov 16(mp,n,8), %rax
mov %rdx, %r9
mul q0
add (up,n,8), %r11
mov %rax, %r11
adc %r10, %rbx
mov 24(mp,n,8), %rax
adc $0, %r9
mov %rdx, %r10
mul q0
add 8(up,n,8), %rbx
mov %rbx, 8(up,n,8)
mov %rax, %rbp
mov 32(mp,n,8), %rax
adc %r9, %r11
mov %rdx, %r9
adc $0, %r10
imul u0inv, %rbx C next q limb
jmp L(e2)
ALIGNx
L(tp2): mul q0
add %rbp, -24(up,i,8)
mov %rax, %rbp
mov (mp,i,8), %rax
adc %r9, %r11
mov %rdx, %r9
adc $0, %r10
mul q0
add %r11, -16(up,i,8)
mov %rax, %r11
mov 8(mp,i,8), %rax
adc %r10, %rbp
mov %rdx, %r10
adc $0, %r9
mul q0
add %rbp, -8(up,i,8)
mov %rax, %rbp
adc %r9, %r11
mov 16(mp,i,8), %rax
adc $0, %r10
mov %rdx, %r9
L(e2): mul q0
add %r11, (up,i,8)
mov %rax, %r11
adc %r10, %rbp
mov 24(mp,i,8), %rax
adc $0, %r9
add $4, i
mov %rdx, %r10
js L(tp2)
L(ed2): mul q0
add %rbp, I(-24(up),-24(up,i,8))
adc %r9, %r11
adc $0, %r10
add %r11, I(-16(up),-16(up,i,8))
adc %r10, %rax
adc $0, %rdx
add %rax, I(-8(up),-8(up,i,8))
adc $0, %rdx
mov %rdx, (up,n,8) C up[0]
mov %rbx, q0 C previously computed q limb -> q0
lea 8(up), up C up++
dec j
jnz L(otp2)
jmp L(cj)
L(n1): mov (mp_param), %rax
mul q0
add -8(up), %rax
adc (up), %rdx
mov %rdx, (rp)
mov $0, R32(%rax)
adc R32(%rax), R32(%rax)
jmp L(ret)
L(n2): mov (mp_param), %rax
mov -16(up), %rbp
mul q0
add %rax, %rbp
mov %rdx, %r9
adc $0, %r9
mov -8(mp), %rax
mov -8(up), %r10
mul q0
add %rax, %r10
mov %rdx, %r11
adc $0, %r11
add %r9, %r10
adc $0, %r11
mov %r10, q0
imul u0inv, q0 C next q0
mov -16(mp), %rax
mul q0
add %rax, %r10
mov %rdx, %r9
adc $0, %r9
mov -8(mp), %rax
mov (up), %r14
mul q0
add %rax, %r14
adc $0, %rdx
add %r9, %r14
adc $0, %rdx
xor R32(%rax), R32(%rax)
add %r11, %r14
adc 8(up), %rdx
mov %r14, (rp)
mov %rdx, 8(rp)
adc R32(%rax), R32(%rax)
jmp L(ret)
ALIGNx
L(n3): mov -24(mp), %rax
mov -24(up), %r10
mul q0
add %rax, %r10
mov -16(mp), %rax
mov %rdx, %r11
adc $0, %r11
mov -16(up), %rbp
mul q0
add %rax, %rbp
mov %rdx, %r9
adc $0, %r9
mov -8(mp), %rax
add %r11, %rbp
mov -8(up), %r10
adc $0, %r9
mul q0
mov %rbp, q0
imul u0inv, q0 C next q0
add %rax, %r10
mov %rdx, %r11
adc $0, %r11
mov %rbp, -16(up)
add %r9, %r10
adc $0, %r11
mov %r10, -8(up)
mov %r11, -24(up) C up[0]
lea 8(up), up C up++
dec j
jnz L(n3)
mov -48(up), %rdx
mov -40(up), %rbx
xor R32(%rax), R32(%rax)
add %rbp, %rdx
adc %r10, %rbx
adc -8(up), %r11
mov %rdx, (rp)
mov %rbx, 8(rp)
mov %r11, 16(rp)
adc R32(%rax), R32(%rax)
jmp L(ret)
L(n4): mov -32(mp), %rax
mul q0
mov %rax, %r11
mov -24(mp), %rax
mov %rdx, %r10
mul q0
mov %rax, %rbx
mov -16(mp), %rax
mov %rdx, %r9
mul q0
add -32(up), %r11
mov %rax, %r11
adc %r10, %rbx
mov -8(mp), %rax
adc $0, %r9
mov %rdx, %r10
mul q0
add -24(up), %rbx
mov %rbx, -24(up)
adc %r9, %r11
adc $0, %r10
imul u0inv, %rbx C next q limb
add %r11, -16(up)
adc %r10, %rax
adc $0, %rdx
add %rax, -8(up)
adc $0, %rdx
mov %rdx, -32(up) C up[0]
mov %rbx, q0 C previously computed q limb -> q0
dec j
lea 8(up), up C up++
jnz L(n4)
jmp L(cj)
EPILOGUE()
ASM_END()

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dnl x86-64 mpn_rsh1add_n/mpn_rsh1sub_n.
dnl Contributed to the GNU project by Torbjorn Granlund.
dnl Copyright 2011, 2012 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C TODO
C * Schedule loop less. It is now almost surely overscheduled, resulting in
C large feed-in and wind-down code.
C cycles/limb
C AMD K8,K9 ?
C AMD K10 ?
C Intel P4 ?
C Intel core2 ?
C Intel NMH ?
C Intel SBR ?
C Intel atom 5.25
C VIA nano ?
C INPUT PARAMETERS
define(`rp',`%rdi')
define(`up',`%rsi')
define(`vp',`%rdx')
define(`n',`%rcx')
ifdef(`OPERATION_rsh1add_n', `
define(ADDSUB, add)
define(ADCSBB, adc)
define(func_n, mpn_rsh1add_n)
define(func_nc, mpn_rsh1add_nc)')
ifdef(`OPERATION_rsh1sub_n', `
define(ADDSUB, sub)
define(ADCSBB, sbb)
define(func_n, mpn_rsh1sub_n)
define(func_nc, mpn_rsh1sub_nc)')
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
MULFUNC_PROLOGUE(mpn_rsh1add_n mpn_rsh1sub_n)
ASM_START()
TEXT
ALIGN(16)
PROLOGUE(func_n)
FUNC_ENTRY(4)
push %rbx
push %rbp
push %r12
push %r13
push %r14
push %r15
mov (up), %r15
ADDSUB (vp), %r15
sbb R32(%rbx), R32(%rbx)
xor R32(%rax), R32(%rax)
shr %r15
adc R32(%rax), R32(%rax) C return value
mov R32(n), R32(%rbp)
and $3, R32(%rbp)
jz L(b0)
cmp $2, R32(%rbp)
jae L(b23)
L(b1): dec n
jnz L(gt1)
shl $63, %rbx
add %rbx, %r15
mov %r15, (rp)
jmp L(cj1)
L(gt1): lea 24(up), up
lea 24(vp), vp
mov -16(up), %r9
add R32(%rbx), R32(%rbx)
mov -8(up), %r10
lea 24(rp), rp
mov (up), %r11
ADCSBB -16(vp), %r9
ADCSBB -8(vp), %r10
mov %r15, %r12
ADCSBB (vp), %r11
mov %r9, %r13
sbb R32(%rbx), R32(%rbx)
mov %r11, %r15
mov %r10, %r14
shl $63, %r11
shl $63, %r10
shl $63, %r9
or %r9, %r12
shr %r13
mov 8(up), %r8
shr %r14
or %r10, %r13
shr %r15
or %r11, %r14
sub $4, n
jz L(cj5)
L(gt5): mov 16(up), %r9
add R32(%rbx), R32(%rbx)
mov 24(up), %r10
ADCSBB 8(vp), %r8
mov %r15, %rbp
mov 32(up), %r11
jmp L(lo1)
L(b23): jnz L(b3)
mov 8(up), %r8
sub $2, n
jnz L(gt2)
add R32(%rbx), R32(%rbx)
ADCSBB 8(vp), %r8
mov %r8, %r12
jmp L(cj2)
L(gt2): mov 16(up), %r9
add R32(%rbx), R32(%rbx)
mov 24(up), %r10
ADCSBB 8(vp), %r8
mov %r15, %rbp
mov 32(up), %r11
ADCSBB 16(vp), %r9
lea 32(up), up
ADCSBB 24(vp), %r10
mov %r9, %r13
ADCSBB 32(vp), %r11
mov %r8, %r12
jmp L(lo2)
L(b3): lea 40(up), up
lea 8(vp), vp
mov %r15, %r14
add R32(%rbx), R32(%rbx)
mov -32(up), %r11
ADCSBB 0(vp), %r11
lea 8(rp), rp
sbb R32(%rbx), R32(%rbx)
mov %r11, %r15
shl $63, %r11
mov -24(up), %r8
shr %r15
or %r11, %r14
sub $3, n
jnz L(gt3)
add R32(%rbx), R32(%rbx)
ADCSBB 8(vp), %r8
jmp L(cj3)
L(gt3): mov -16(up), %r9
add R32(%rbx), R32(%rbx)
mov -8(up), %r10
ADCSBB 8(vp), %r8
mov %r15, %rbp
mov (up), %r11
ADCSBB 16(vp), %r9
ADCSBB 24(vp), %r10
mov %r8, %r12
jmp L(lo3)
L(b0): lea 48(up), up
lea 16(vp), vp
add R32(%rbx), R32(%rbx)
mov -40(up), %r10
lea 16(rp), rp
mov -32(up), %r11
ADCSBB -8(vp), %r10
mov %r15, %r13
ADCSBB (vp), %r11
sbb R32(%rbx), R32(%rbx)
mov %r11, %r15
mov %r10, %r14
shl $63, %r11
shl $63, %r10
mov -24(up), %r8
shr %r14
or %r10, %r13
shr %r15
or %r11, %r14
sub $4, n
jnz L(gt4)
add R32(%rbx), R32(%rbx)
ADCSBB 8(vp), %r8
jmp L(cj4)
L(gt4): mov -16(up), %r9
add R32(%rbx), R32(%rbx)
mov -8(up), %r10
ADCSBB 8(vp), %r8
mov %r15, %rbp
mov (up), %r11
ADCSBB 16(vp), %r9
jmp L(lo0)
ALIGN(8)
L(top): mov 16(up), %r9
shr %r14
or %r10, %r13
shr %r15
or %r11, %r14
add R32(%rbx), R32(%rbx)
mov 24(up), %r10
mov %rbp, (rp)
ADCSBB 8(vp), %r8
mov %r15, %rbp
lea 32(rp), rp
mov 32(up), %r11
L(lo1): ADCSBB 16(vp), %r9
lea 32(up), up
mov %r12, -24(rp)
L(lo0): ADCSBB 24(vp), %r10
mov %r8, %r12
mov %r13, -16(rp)
L(lo3): ADCSBB 32(vp), %r11
mov %r9, %r13
mov %r14, -8(rp)
L(lo2): sbb R32(%rbx), R32(%rbx)
shl $63, %r8
mov %r11, %r15
shr %r12
mov %r10, %r14
shl $63, %r9
lea 32(vp), vp
shl $63, %r10
or %r8, %rbp
shl $63, %r11
or %r9, %r12
shr %r13
mov 8(up), %r8
sub $4, n
jg L(top)
L(end): shr %r14
or %r10, %r13
shr %r15
or %r11, %r14
mov %rbp, (rp)
lea 32(rp), rp
L(cj5): add R32(%rbx), R32(%rbx)
ADCSBB 8(vp), %r8
mov %r12, -24(rp)
L(cj4): mov %r13, -16(rp)
L(cj3): mov %r8, %r12
mov %r14, -8(rp)
L(cj2): sbb R32(%rbx), R32(%rbx)
shl $63, %r8
shr %r12
or %r8, %r15
shl $63, %rbx
add %rbx, %r12
mov %r15, (rp)
mov %r12, 8(rp)
L(cj1): pop %r15
pop %r14
pop %r13
pop %r12
pop %rbp
pop %rbx
FUNC_EXIT()
ret
EPILOGUE()

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blender-5.2.0/extern/gmp-source/mpn/x86_64/atom/rshift.asm vendored Normal file
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dnl AMD64 mpn_rshift -- mpn right shift, optimised for Atom.
dnl Contributed to the GNU project by Torbjorn Granlund.
dnl Copyright 2011, 2012 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/limb
C AMD K8,K9 ?
C AMD K10 ?
C Intel P4 ?
C Intel core2 ?
C Intel NHM ?
C Intel SBR ?
C Intel atom 4.5
C VIA nano ?
C TODO
C * Consider using 4-way unrolling. We reach 4 c/l, but the code is 2.5 times
C larger.
C INPUT PARAMETERS
define(`rp', `%rdi')
define(`up', `%rsi')
define(`n', `%rdx')
define(`cnt', `%rcx')
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
ASM_START()
TEXT
ALIGN(16)
PROLOGUE(mpn_rshift)
FUNC_ENTRY(4)
shr R32(n)
mov (up), %rax
jnc L(evn)
mov %rax, %r11
shr R8(cnt), %r11
neg R8(cnt)
shl R8(cnt), %rax
test n, n
jnz L(gt1)
mov %r11, (rp)
FUNC_EXIT()
ret
L(gt1): mov 8(up), %r8
mov %r8, %r10
shl R8(cnt), %r8
jmp L(lo1)
L(evn): mov %rax, %r10
neg R8(cnt)
shl R8(cnt), %rax
mov 8(up), %r9
mov %r9, %r11
shl R8(cnt), %r9
neg R8(cnt)
dec n
lea -8(rp), rp
lea 8(up), up
jz L(end)
ALIGN(8)
L(top): shr R8(cnt), %r10
or %r10, %r9
shr R8(cnt), %r11
neg R8(cnt)
mov 8(up), %r8
mov %r8, %r10
mov %r9, 8(rp)
shl R8(cnt), %r8
lea 16(rp), rp
L(lo1): mov 16(up), %r9
or %r11, %r8
mov %r9, %r11
shl R8(cnt), %r9
lea 16(up), up
neg R8(cnt)
mov %r8, (rp)
dec n
jg L(top)
L(end): shr R8(cnt), %r10
or %r10, %r9
shr R8(cnt), %r11
mov %r9, 8(rp)
mov %r11, 16(rp)
FUNC_EXIT()
ret
EPILOGUE()

242
blender-5.2.0/extern/gmp-source/mpn/x86_64/atom/sublsh1_n.asm vendored Normal file
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dnl AMD64 mpn_sublsh1_n optimised for Intel Atom.
dnl Used also for AMD bd1.
dnl Contributed to the GNU project by Torbjorn Granlund.
dnl Copyright 2011, 2012 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C TODO
C * This code is slightly large at 501 bytes.
C * aorrlsh1_n.asm and this file use the same basic pattern.
C cycles/limb
C AMD K8,K9 ?
C AMD K10 ?
C AMD bd1 2.3
C AMD bobcat ?
C Intel P4 ?
C Intel core2 ?
C Intel NHM ?
C Intel SBR ?
C Intel atom 5 (4.875 is probably possible)
C VIA nano ?
C INPUT PARAMETERS
define(`rp', `%rdi')
define(`up', `%rsi')
define(`vp', `%rdx')
define(`n', `%rcx')
define(`cy', `%r8')
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
ASM_START()
TEXT
ALIGN(16)
PROLOGUE(mpn_sublsh1_n)
FUNC_ENTRY(4)
push %rbp
push %r15
xor R32(%rbp), R32(%rbp)
L(ent): mov R32(n), R32(%rax)
and $3, R32(%rax)
jz L(b0)
cmp $2, R32(%rax)
jz L(b2)
jg L(b3)
L(b1): mov (vp), %r8
add %r8, %r8
lea 8(vp), vp
sbb R32(%rax), R32(%rax) C save scy
add R32(%rbp), R32(%rbp) C restore acy
mov (up), %r15
sbb %r8, %r15
mov %r15, (rp)
sbb R32(%rbp), R32(%rbp) C save acy
lea 8(up), up
lea 8(rp), rp
jmp L(b0)
L(b2): mov (vp), %r8
add %r8, %r8
mov 8(vp), %r9
adc %r9, %r9
lea 16(vp), vp
sbb R32(%rax), R32(%rax) C save scy
add R32(%rbp), R32(%rbp) C restore acy
mov (up), %r15
sbb %r8, %r15
mov %r15, (rp)
mov 8(up), %r15
sbb %r9, %r15
mov %r15, 8(rp)
sbb R32(%rbp), R32(%rbp) C save acy
lea 16(up), up
lea 16(rp), rp
jmp L(b0)
L(b3): mov (vp), %r8
add %r8, %r8
mov 8(vp), %r9
adc %r9, %r9
mov 16(vp), %r10
adc %r10, %r10
lea 24(vp), vp
sbb R32(%rax), R32(%rax) C save scy
add R32(%rbp), R32(%rbp) C restore acy
mov (up), %r15
sbb %r8, %r15
mov %r15, (rp)
mov 8(up), %r15
sbb %r9, %r15
mov %r15, 8(rp)
mov 16(up), %r15
sbb %r10, %r15
mov %r15, 16(rp)
sbb R32(%rbp), R32(%rbp) C save acy
lea 24(up), up
lea 24(rp), rp
L(b0): test $4, R8(n)
jz L(skp)
add R32(%rax), R32(%rax) C restore scy
mov (vp), %r8
adc %r8, %r8
mov 8(vp), %r9
adc %r9, %r9
mov 16(vp), %r10
adc %r10, %r10
mov 24(vp), %r11
adc %r11, %r11
lea 32(vp), vp
sbb R32(%rax), R32(%rax) C save scy
add R32(%rbp), R32(%rbp) C restore acy
mov (up), %r15
sbb %r8, %r15
mov %r15, (rp)
mov 8(up), %r15
sbb %r9, %r15
mov %r15, 8(rp)
mov 16(up), %r15
sbb %r10, %r15
mov %r15, 16(rp)
mov 24(up), %r15
sbb %r11, %r15
mov %r15, 24(rp)
lea 32(up), up
lea 32(rp), rp
sbb R32(%rbp), R32(%rbp) C save acy
L(skp): cmp $8, n
jl L(rtn)
push %r12
push %r13
push %r14
push %rbx
lea -64(rp), rp
jmp L(x)
ALIGN(16)
L(top): mov (vp), %r8
add R32(%rax), R32(%rax)
lea 64(vp), vp
adc %r8, %r8
mov -56(vp), %r9
adc %r9, %r9
mov -48(vp), %r10
adc %r10, %r10
mov -40(vp), %r11
adc %r11, %r11
mov -32(vp), %r12
adc %r12, %r12
mov -24(vp), %r13
adc %r13, %r13
mov -16(vp), %r14
adc %r14, %r14
mov -8(vp), %r15
adc %r15, %r15
sbb R32(%rax), R32(%rax)
add R32(%rbp), R32(%rbp)
mov (up), %rbp
lea 64(rp), rp
mov 8(up), %rbx
sbb %r8, %rbp
mov 32(up), %r8
mov %rbp, (rp)
sbb %r9, %rbx
mov 16(up), %rbp
mov %rbx, 8(rp)
sbb %r10, %rbp
mov 24(up), %rbx
mov %rbp, 16(rp)
sbb %r11, %rbx
mov %rbx, 24(rp)
sbb %r12, %r8
mov 40(up), %r9
mov %r8, 32(rp)
sbb %r13, %r9
mov 48(up), %rbp
mov %r9, 40(rp)
sbb %r14, %rbp
mov 56(up), %rbx
mov %rbp, 48(rp)
sbb %r15, %rbx
lea 64(up), up
mov %rbx, 56(rp)
sbb R32(%rbp), R32(%rbp)
L(x): sub $8, n
jge L(top)
L(end): pop %rbx
pop %r14
pop %r13
pop %r12
L(rtn):
add R32(%rbp), R32(%rax)
neg R32(%rax)
pop %r15
pop %rbp
FUNC_EXIT()
ret
EPILOGUE()
PROLOGUE(mpn_sublsh1_nc)
FUNC_ENTRY(4)
IFDOS(` mov 56(%rsp), %r8 ')
push %rbp
push %r15
neg %r8 C set CF
sbb R32(%rbp), R32(%rbp) C save acy
jmp L(ent)
EPILOGUE()

11
blender-5.2.0/extern/gmp-source/mpn/x86_64/bd1/README vendored Normal file
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This directory contains code for AMD bulldozer including its piledriver update.
We currently make limited use of SIMD instructions, both via the MPN_PATH and
via inclusion of x86_64/fastsse files.
The bd1 cores share one SIMD/FPU pipeline for two integer units. This probably
means that an all-core GMP load (such as a HPC load) might run slower if there
is significant SIMD dependency.
We should perhaps allow a special 'bd1nosimd' pseudo cpu-name excluding any
SIMD code.

235
blender-5.2.0/extern/gmp-source/mpn/x86_64/bd1/addmul_2.asm vendored Normal file
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dnl AMD64 mpn_addmul_2 optimised for AMD Bulldozer.
dnl Copyright 2017 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/limb
C AMD K8,K9
C AMD K10
C AMD bd1 4.2
C AMD bd2 4.4
C AMD bd3
C AMD bd4
C AMD zen
C AMD bt1
C AMD bt2
C Intel P4
C Intel PNR
C Intel NHM
C Intel SBR
C Intel IBR
C Intel HWL
C Intel BWL
C Intel SKL
C Intel atom
C Intel SLM
C VIA nano
C The loop of this code is the result of running a code generation and
C optimisation tool suite written by David Harvey and Torbjorn Granlund.
define(`rp', `%rdi') C rcx
define(`up', `%rsi') C rdx
define(`n_param', `%rdx') C r8
define(`vp', `%rcx') C r9
define(`n', `%rcx')
define(`v0', `%rbx')
define(`v1', `%rbp')
define(`X0', `%r12')
define(`X1', `%r13')
define(`w0', `%r8')
define(`w1', `%r9')
define(`w2', `%r10')
define(`w3', `%r11')
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
ASM_START()
TEXT
ALIGN(32)
PROLOGUE(mpn_addmul_2)
FUNC_ENTRY(4)
push %rbx
push %rbp
push %r12
push %r13
mov (vp), v0
mov 8(vp), v1
mov (up), %rax
mov $0, R32(w2) C abuse w2
lea (up,n_param,8), up
lea (rp,n_param,8), rp
sub n_param, w2
mul v0
test $1, R8(w2)
jnz L(bx1)
L(bx0): mov %rdx, X0
mov %rax, X1
test $2, R8(w2)
jnz L(b10)
L(b00): lea (w2), n C un = 4, 8, 12, ...
mov (up,w2,8), %rax
mov (rp,w2,8), w3
mul v1
mov %rax, w0
mov 8(up,w2,8), %rax
mov %rdx, w1
jmp L(lo0)
L(b10): lea 2(w2), n C un = 2, 6, 10, ...
mov (up,w2,8), %rax
mov (rp,w2,8), w1
mul v1
mov %rdx, w3
mov %rax, w2
mov -8(up,n,8), %rax
test n, n
jz L(end)
jmp L(top)
L(bx1): mov %rax, X0
mov %rdx, X1
test $2, R8(w2)
jz L(b11)
L(b01): lea 1(w2), n C un = 1, 5, 9, ...
mov (up,w2,8), %rax
mul v1
mov (rp,w2,8), w2
mov %rdx, w0
mov %rax, w3
jmp L(lo1)
L(b11): lea -1(w2), n C un = 3, 7, 11, ...
mov (up,w2,8), %rax
mul v1
mov (rp,w2,8), w0
mov %rax, w1
mov 8(up,w2,8), %rax
mov %rdx, w2
jmp L(lo3)
ALIGN(32)
L(top):
L(lo2): mul v0
add w1, X1
mov X1, -16(rp,n,8)
mov %rdx, X1
adc %rax, X0
adc $0, X1
mov -8(up,n,8), %rax
mul v1
mov -8(rp,n,8), w1
mov %rdx, w0
add w1, w2
adc %rax, w3
adc $0, w0
L(lo1): mov (up,n,8), %rax
mul v0
add w2, X0
mov X0, -8(rp,n,8)
mov %rdx, X0
adc %rax, X1
mov (up,n,8), %rax
adc $0, X0
mov (rp,n,8), w2
mul v1
add w2, w3
adc %rax, w0
mov 8(up,n,8), %rax
mov %rdx, w1
adc $0, w1
L(lo0): mul v0
add w3, X1
mov X1, (rp,n,8)
adc %rax, X0
mov 8(up,n,8), %rax
mov %rdx, X1
adc $0, X1
mov 8(rp,n,8), w3
mul v1
add w3, w0
adc %rax, w1
mov 16(up,n,8), %rax
mov %rdx, w2
adc $0, w2
L(lo3): mul v0
add w0, X0
mov X0, 8(rp,n,8)
mov %rdx, X0
adc %rax, X1
adc $0, X0
mov 16(up,n,8), %rax
mov 16(rp,n,8), w0
mul v1
mov %rdx, w3
add w0, w1
adc %rax, w2
adc $0, w3
mov 24(up,n,8), %rax
add $4, n
jnc L(top)
L(end): mul v0
add w1, X1
mov X1, -16(rp)
mov %rdx, X1
adc %rax, X0
adc $0, X1
mov -8(up), %rax
mul v1
mov -8(rp), w1
add w1, w2
adc %rax, w3
adc $0, %rdx
add w2, X0
adc $0, X1
mov X0, -8(rp)
add w3, X1
mov X1, (rp)
adc $0, %rdx
mov %rdx, %rax
pop %r13
pop %r12
pop %rbp
pop %rbx
FUNC_EXIT()
ret
EPILOGUE()

37
blender-5.2.0/extern/gmp-source/mpn/x86_64/bd1/aorrlsh1_n.asm vendored Normal file
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dnl AMD64 mpn_addlsh1_n and mpn_rsblsh1_n
dnl Copyright 2013 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
MULFUNC_PROLOGUE(mpn_addlsh1_n mpn_addlsh1_nc mpn_rsblsh1_n mpn_rsblsh1_nc)
include_mpn(`x86_64/atom/aorrlsh1_n.asm')

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dnl X86-64 mpn_addlsh_n and mpn_rsblsh_n.
dnl Copyright 2017 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
MULFUNC_PROLOGUE(mpn_addlsh_n mpn_rsblsh_n)
include_mpn(`x86_64/aorrlsh_n.asm')

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dnl X86-64 mpn_add_n, mpn_sub_n, optimised for Intel Silvermont.
dnl Copyright 2017 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
MULFUNC_PROLOGUE(mpn_add_n mpn_add_nc mpn_sub_n mpn_sub_nc)
include_mpn(`x86_64/coreihwl/aors_n.asm')

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dnl AMD64 mpn_addmul_1 and mpn_submul_1 optimised for AMD Bulldozer.
dnl Copyright 2003-2005, 2007, 2008, 2011, 2012 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/limb
C AMD K8,K9 3.30 3.58
C AMD K10 3.09
C AMD bull 4.47 4.72
C AMD pile 4.66
C AMD steam
C AMD excavator
C AMD bobcat 6.30
C AMD jaguar 6.29
C Intel P4 17.3 17.8
C Intel core2 5.13
C Intel NHM 4.85
C Intel SBR 3.83
C Intel IBR 3.75
C Intel HWL 3.45
C Intel BWL 2.56
C Intel SKL 2.53
C Intel atom 20.3
C Intel SLM 9
C VIA nano
C The loop of this code is the result of running a code generation and
C optimisation tool suite written by David Harvey and Torbjorn Granlund.
C TODO
C * Try to make loop run closer to 4 c/l in Bulldozer and Piledriver.
define(`rp', `%rdi') C rcx
define(`up', `%rsi') C rdx
define(`n_param', `%rdx') C r8
define(`v0', `%rcx') C r9
define(`n', `%r11')
ifdef(`OPERATION_addmul_1',`
define(`ADDSUB', `add')
define(`func', `mpn_addmul_1')
')
ifdef(`OPERATION_submul_1',`
define(`ADDSUB', `sub')
define(`func', `mpn_submul_1')
')
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
MULFUNC_PROLOGUE(mpn_addmul_1 mpn_submul_1)
IFDOS(` define(`up', ``%rsi'') ') dnl
IFDOS(` define(`rp', ``%rcx'') ') dnl
IFDOS(` define(`v0', ``%r9'') ') dnl
IFDOS(` define(`r9', ``rdi'') ') dnl
IFDOS(` define(`n', ``%r8'') ') dnl
IFDOS(` define(`r8', ``r11'') ') dnl
ASM_START()
TEXT
ALIGN(16)
PROLOGUE(func)
IFDOS(``push %rsi '')
IFDOS(``push %rdi '')
IFDOS(``mov %rdx, %rsi '')
mov (up), %rax C read first u limb early
push %rbx
IFSTD(` mov n_param, %rbx ') C move away n from rdx, mul uses it
IFDOS(` mov n, %rbx ')
mul v0
IFSTD(` mov %rbx, n ')
and $3, R32(%rbx)
lea -16(rp,n,8), rp
jz L(b0)
cmp $2, R32(%rbx)
jb L(b1)
jz L(b2)
L(b3): mov $0, R32(%r8)
mov %rax, %rbx
mov $0, R32(%r9)
mov 8(up), %rax
mov %rdx, %r10
lea (up,n,8), up
not n
jmp L(L3)
L(b0): mov $0, R32(%r10)
mov %rax, %r8
mov %rdx, %rbx
mov 8(up), %rax
lea (up,n,8), up
neg n
jmp L(L0)
L(b1): cmp $1, n
jz L(n1)
mov %rax, %r9
mov 8(up), %rax
mov %rdx, %r8
mov $0, R32(%rbx)
lea (up,n,8), up
neg n
inc n
jmp L(L1)
L(b2): mov $0, R32(%rbx)
mov %rax, %r10
mov %rdx, %r9
mov 8(up), %rax
mov $0, R32(%r8)
lea (up,n,8), up
neg n
add $2, n
jns L(end)
ALIGN(32)
L(top): mul v0
ADDSUB %r10, (rp,n,8)
adc %rax, %r9
mov (up,n,8), %rax
adc %rdx, %r8
L(L1): mul v0
mov $0, R32(%r10)
ADDSUB %r9, 8(rp,n,8)
adc %rax, %r8
adc %rdx, %rbx
mov 8(up,n,8), %rax
L(L0): mul v0
ADDSUB %r8, 16(rp,n,8)
mov $0, R32(%r8)
adc %rax, %rbx
mov $0, R32(%r9)
mov 16(up,n,8), %rax
adc %rdx, %r10
L(L3): mul v0
ADDSUB %rbx, 24(rp,n,8)
mov $0, R32(%rbx)
adc %rax, %r10
adc %rdx, %r9
mov 24(up,n,8), %rax
add $4, n
js L(top)
L(end): mul v0
ADDSUB %r10, (rp)
adc %r9, %rax
adc %r8, %rdx
L(n1): ADDSUB %rax, 8(rp)
adc $0, %rdx
mov %rdx, %rax
pop %rbx
IFDOS(``pop %rdi '')
IFDOS(``pop %rsi '')
ret
EPILOGUE()
ASM_END()

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dnl X86-64 mpn_com optimised for AMD bd1.
dnl Copyright 2012 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
MULFUNC_PROLOGUE(mpn_com)
include_mpn(`x86_64/fastsse/com-palignr.asm')

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dnl X86-64 mpn_copyd optimised for AMD bd1.
dnl Copyright 2012 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
MULFUNC_PROLOGUE(mpn_copyd)
include_mpn(`x86_64/fastsse/copyd-palignr.asm')

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dnl X86-64 mpn_copyi optimised for AMD bd1.
dnl Copyright 2012 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
MULFUNC_PROLOGUE(mpn_copyi)
include_mpn(`x86_64/fastsse/copyi-palignr.asm')

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dnl AMD64 mpn_gcd_11.
dnl Copyright 2012 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
MULFUNC_PROLOGUE(mpn_gcd_11)
include_mpn(`x86_64/core2/gcd_11.asm')

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/* AMD bd1 gmp-mparam.h -- Compiler/machine parameter header file.
Copyright 2019 Free Software Foundation, Inc.
This file is part of the GNU MP Library.
The GNU MP Library is free software; you can redistribute it and/or modify
it under the terms of either:
* the GNU Lesser General Public License as published by the Free
Software Foundation; either version 3 of the License, or (at your
option) any later version.
or
* the GNU General Public License as published by the Free Software
Foundation; either version 2 of the License, or (at your option) any
later version.
or both in parallel, as here.
The GNU MP Library is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
for more details.
You should have received copies of the GNU General Public License and the
GNU Lesser General Public License along with the GNU MP Library. If not,
see https://www.gnu.org/licenses/. */
#define GMP_LIMB_BITS 64
#define GMP_LIMB_BYTES 8
/* 3600-3800 MHz Bulldozer Zambezi */
/* FFT tuning limit = 464,627,200 */
/* Generated by tuneup.c, 2019-10-20, gcc 8.3 */
#define MOD_1_NORM_THRESHOLD 0 /* always */
#define MOD_1_UNNORM_THRESHOLD 0 /* always */
#define MOD_1N_TO_MOD_1_1_THRESHOLD 5
#define MOD_1U_TO_MOD_1_1_THRESHOLD 3
#define MOD_1_1_TO_MOD_1_2_THRESHOLD 31
#define MOD_1_2_TO_MOD_1_4_THRESHOLD 0 /* never mpn_mod_1s_2p */
#define PREINV_MOD_1_TO_MOD_1_THRESHOLD 12
#define USE_PREINV_DIVREM_1 1 /* native */
#define DIV_QR_1_NORM_THRESHOLD 2
#define DIV_QR_1_UNNORM_THRESHOLD MP_SIZE_T_MAX /* never */
#define DIV_QR_2_PI2_THRESHOLD MP_SIZE_T_MAX /* never */
#define DIVEXACT_1_THRESHOLD 0 /* always (native) */
#define BMOD_1_TO_MOD_1_THRESHOLD 27
#define DIV_1_VS_MUL_1_PERCENT 275
#define MUL_TOOM22_THRESHOLD 20
#define MUL_TOOM33_THRESHOLD 57
#define MUL_TOOM44_THRESHOLD 161
#define MUL_TOOM6H_THRESHOLD 226
#define MUL_TOOM8H_THRESHOLD 339
#define MUL_TOOM32_TO_TOOM43_THRESHOLD 61
#define MUL_TOOM32_TO_TOOM53_THRESHOLD 108
#define MUL_TOOM42_TO_TOOM53_THRESHOLD 105
#define MUL_TOOM42_TO_TOOM63_THRESHOLD 113
#define MUL_TOOM43_TO_TOOM54_THRESHOLD 91
#define SQR_BASECASE_THRESHOLD 0 /* always (native) */
#define SQR_TOOM2_THRESHOLD 24
#define SQR_TOOM3_THRESHOLD 85
#define SQR_TOOM4_THRESHOLD 234
#define SQR_TOOM6_THRESHOLD 286
#define SQR_TOOM8_THRESHOLD 466
#define MULMID_TOOM42_THRESHOLD 20
#define MULMOD_BNM1_THRESHOLD 12
#define SQRMOD_BNM1_THRESHOLD 15
#define MUL_FFT_MODF_THRESHOLD 412 /* k = 5 */
#define MUL_FFT_TABLE3 \
{ { 412, 5}, { 19, 6}, { 10, 5}, { 21, 6}, \
{ 11, 5}, { 23, 6}, { 25, 7}, { 13, 6}, \
{ 28, 7}, { 25, 8}, { 13, 7}, { 28, 8}, \
{ 15, 7}, { 32, 8}, { 17, 7}, { 35, 8}, \
{ 19, 7}, { 39, 8}, { 27, 9}, { 15, 8}, \
{ 35, 9}, { 19, 8}, { 41, 9}, { 23, 8}, \
{ 47, 9}, { 27,10}, { 15, 9}, { 39,10}, \
{ 23, 9}, { 55,11}, { 15,10}, { 31, 9}, \
{ 71,10}, { 39, 9}, { 83,10}, { 47, 9}, \
{ 99,10}, { 55,11}, { 31,10}, { 79,11}, \
{ 47,10}, { 103,12}, { 31,11}, { 63, 7}, \
{ 1023, 8}, { 543, 9}, { 303,10}, { 167,11}, \
{ 95,10}, { 191,12}, { 63,11}, { 127,10}, \
{ 255,11}, { 143,10}, { 287,11}, { 159,12}, \
{ 95,11}, { 191,13}, { 63,12}, { 127,11}, \
{ 255,10}, { 511,11}, { 271,10}, { 543,11}, \
{ 287,12}, { 159,11}, { 319,10}, { 639,11}, \
{ 351,12}, { 191,11}, { 383,10}, { 767,12}, \
{ 223,11}, { 447,13}, { 127,12}, { 255,11}, \
{ 511,10}, { 1023,11}, { 543,12}, { 287,11}, \
{ 575,10}, { 1151,11}, { 607,12}, { 319,11}, \
{ 639,10}, { 1279,11}, { 671,12}, { 351,13}, \
{ 191,12}, { 383,11}, { 767,12}, { 415,11}, \
{ 831,12}, { 447,14}, { 127,13}, { 255,12}, \
{ 511,11}, { 1023,12}, { 543,11}, { 1087,10}, \
{ 2175,12}, { 575,11}, { 1151,12}, { 607,13}, \
{ 319,12}, { 639,11}, { 1279,12}, { 671,11}, \
{ 1343,10}, { 2687,12}, { 703,11}, { 1407,13}, \
{ 383,12}, { 767,11}, { 1535,12}, { 799,11}, \
{ 1599,12}, { 831,13}, { 447,12}, { 895,14}, \
{ 255,13}, { 511,12}, { 1023,11}, { 2047,12}, \
{ 1087,11}, { 2175,13}, { 575,12}, { 1215,11}, \
{ 2431,13}, { 639,12}, { 1343,11}, { 2687,13}, \
{ 703,12}, { 1407,14}, { 383,13}, { 767,12}, \
{ 1599,13}, { 831,12}, { 1727,11}, { 3455,13}, \
{ 895,15}, { 255,14}, { 511,13}, { 1023,12}, \
{ 2047,13}, { 1087,12}, { 2175,13}, { 1215,12}, \
{ 2431,11}, { 4863,14}, { 639,13}, { 1343,12}, \
{ 2687,13}, { 1471,12}, { 2943,11}, { 5887,14}, \
{ 767,13}, { 1599,12}, { 3199,13}, { 1727,12}, \
{ 3455,14}, { 895,13}, { 1919,15}, { 511,14}, \
{ 1023,13}, { 2175,14}, { 1151,13}, { 2431,12}, \
{ 4863,14}, { 1279,13}, { 2687,14}, { 1407,13}, \
{ 2815,12}, { 5631,13}, { 2943,12}, { 5887,15}, \
{ 767,14}, { 1535,13}, { 3199,14}, { 1663,13}, \
{ 3455,12}, { 6911,14}, { 1791,13}, { 3583,14}, \
{ 1919,13}, { 3839,16}, { 511,15}, { 1023,14}, \
{ 2175,13}, { 4479,14}, { 2431,13}, { 4863,15}, \
{ 1279,14}, { 2943,13}, { 5887,12}, { 11775,15}, \
{ 1535,14}, { 3455,13}, { 6911,15}, { 1791,14}, \
{ 3839,13}, { 7679,16}, { 1023,15}, { 2047,14}, \
{ 4479,15}, { 2303,14}, { 4863,15}, { 2559,14}, \
{ 5247,15}, { 2815,14}, { 5887,13}, { 11775,16}, \
{ 1535,15}, { 3327,14}, { 6911,15}, { 3839,14}, \
{ 7679,13}, { 15359,17}, { 1023,16}, { 2047,15}, \
{ 4351,14}, { 8959,15}, { 4863,16}, { 2559,15}, \
{ 5887,14}, { 11775,16}, { 3071,15}, { 6911,16}, \
{ 3583,15}, { 7679,14}, { 15359,15}, { 7935,17}, \
{ 2047,16}, { 4095,15}, { 8959,16}, { 4607,15}, \
{ 9983,14}, { 19967,16}, { 5119,15}, { 10239,16}, \
{ 5631,15}, { 11775,17}, { 3071,16}, { 65536,17}, \
{ 131072,18}, { 262144,19}, { 524288,20}, {1048576,21}, \
{2097152,22}, {4194304,23}, {8388608,24} }
#define MUL_FFT_TABLE3_SIZE 251
#define MUL_FFT_THRESHOLD 4544
#define SQR_FFT_MODF_THRESHOLD 364 /* k = 5 */
#define SQR_FFT_TABLE3 \
{ { 364, 5}, { 19, 6}, { 10, 5}, { 21, 6}, \
{ 11, 5}, { 23, 6}, { 12, 5}, { 25, 6}, \
{ 25, 7}, { 13, 6}, { 27, 7}, { 25, 8}, \
{ 13, 7}, { 28, 8}, { 15, 7}, { 31, 8}, \
{ 17, 7}, { 35, 8}, { 19, 7}, { 39, 8}, \
{ 27, 9}, { 15, 8}, { 35, 9}, { 19, 8}, \
{ 41, 9}, { 23, 8}, { 47, 9}, { 27,10}, \
{ 15, 9}, { 39,10}, { 23, 9}, { 51,11}, \
{ 15,10}, { 31, 9}, { 67,10}, { 39, 9}, \
{ 79,10}, { 47,11}, { 31,10}, { 79,11}, \
{ 47,10}, { 95,12}, { 31,11}, { 63,10}, \
{ 135,11}, { 79,10}, { 159,11}, { 95, 7}, \
{ 1535, 8}, { 799, 7}, { 1599, 8}, { 831, 9}, \
{ 447,10}, { 239,11}, { 127,10}, { 255,11}, \
{ 143,10}, { 303,11}, { 159,12}, { 95,11}, \
{ 191,10}, { 383,13}, { 63,12}, { 127,11}, \
{ 255,10}, { 511,11}, { 303,12}, { 159,11}, \
{ 351,12}, { 191,11}, { 383,10}, { 767,11}, \
{ 415,12}, { 223,11}, { 447,13}, { 127,12}, \
{ 255,11}, { 511,10}, { 1023,12}, { 287,11}, \
{ 575,10}, { 1151,11}, { 607,12}, { 319,11}, \
{ 639,10}, { 1279,11}, { 671,12}, { 351,13}, \
{ 191,12}, { 383,11}, { 767,10}, { 1535,12}, \
{ 415,11}, { 831,12}, { 447,14}, { 127,13}, \
{ 255,12}, { 511,11}, { 1023,12}, { 543,11}, \
{ 1087,10}, { 2175,12}, { 575,11}, { 1151,12}, \
{ 607,13}, { 319,12}, { 639,11}, { 1279,12}, \
{ 671,11}, { 1343,12}, { 703,11}, { 1407,12}, \
{ 735,13}, { 383,12}, { 767,11}, { 1535,12}, \
{ 799,11}, { 1599,12}, { 831,13}, { 447,12}, \
{ 895,14}, { 255,13}, { 511,12}, { 1023,11}, \
{ 2047,12}, { 1087,11}, { 2175,13}, { 575,12}, \
{ 1151,11}, { 2303,12}, { 1215,11}, { 2431,13}, \
{ 639,12}, { 1343,13}, { 703,12}, { 1407,14}, \
{ 383,13}, { 767,12}, { 1599,11}, { 3199,13}, \
{ 831,12}, { 1727,11}, { 3455,13}, { 895,15}, \
{ 255,14}, { 511,13}, { 1023,12}, { 2047,13}, \
{ 1087,12}, { 2175,13}, { 1151,12}, { 2303,13}, \
{ 1215,12}, { 2431,14}, { 639,13}, { 1343,12}, \
{ 2687,13}, { 1471,12}, { 2943,11}, { 5887,14}, \
{ 767,13}, { 1599,12}, { 3199,13}, { 1727,12}, \
{ 3455,11}, { 6911,14}, { 895,13}, { 1791,12}, \
{ 3583,13}, { 1919,12}, { 3839,15}, { 511,14}, \
{ 1023,13}, { 2175,14}, { 1151,13}, { 2431,12}, \
{ 4863,14}, { 1279,13}, { 2687,14}, { 1407,13}, \
{ 2943,12}, { 5887,11}, { 11775,15}, { 767,14}, \
{ 1535,13}, { 3199,14}, { 1663,13}, { 3455,12}, \
{ 6911,14}, { 1791,13}, { 3583,14}, { 1919,13}, \
{ 3839,16}, { 511,15}, { 1023,14}, { 2175,13}, \
{ 4351,12}, { 8703,13}, { 4479,12}, { 8959,14}, \
{ 2303,13}, { 4607,14}, { 2431,13}, { 4863,15}, \
{ 1279,14}, { 2815,13}, { 5631,14}, { 2943,13}, \
{ 5887,12}, { 11775,15}, { 1535,14}, { 3455,13}, \
{ 6911,15}, { 1791,14}, { 3839,13}, { 7679,16}, \
{ 1023,15}, { 2047,14}, { 4351,13}, { 8703,14}, \
{ 4479,13}, { 8959,15}, { 2303,14}, { 4991,13}, \
{ 9983,15}, { 2559,14}, { 5119,15}, { 2815,14}, \
{ 5887,13}, { 11775,16}, { 1535,15}, { 3071,14}, \
{ 6143,15}, { 3327,14}, { 6911,15}, { 3839,14}, \
{ 7679,13}, { 15359,17}, { 1023,16}, { 2047,15}, \
{ 4095,14}, { 8191,15}, { 4351,14}, { 8959,15}, \
{ 4863,14}, { 9983,16}, { 2559,15}, { 5887,14}, \
{ 11775,16}, { 3071,15}, { 6911,16}, { 3583,15}, \
{ 7679,14}, { 15359,15}, { 7935,14}, { 15871,17}, \
{ 2047,16}, { 4095,15}, { 8959,16}, { 4607,15}, \
{ 9983,14}, { 19967,16}, { 5119,15}, { 10239,16}, \
{ 5631,15}, { 11775,17}, { 3071,16}, { 65536,17}, \
{ 131072,18}, { 262144,19}, { 524288,20}, {1048576,21}, \
{2097152,22}, {4194304,23}, {8388608,24} }
#define SQR_FFT_TABLE3_SIZE 275
#define SQR_FFT_THRESHOLD 3264
#define MULLO_BASECASE_THRESHOLD 0 /* always */
#define MULLO_DC_THRESHOLD 23
#define MULLO_MUL_N_THRESHOLD 8907
#define SQRLO_BASECASE_THRESHOLD 9
#define SQRLO_DC_THRESHOLD 0 /* never mpn_sqrlo_basecase */
#define SQRLO_SQR_THRESHOLD 6440
#define DC_DIV_QR_THRESHOLD 52
#define DC_DIVAPPR_Q_THRESHOLD 167
#define DC_BDIV_QR_THRESHOLD 48
#define DC_BDIV_Q_THRESHOLD 93
#define INV_MULMOD_BNM1_THRESHOLD 38
#define INV_NEWTON_THRESHOLD 197
#define INV_APPR_THRESHOLD 179
#define BINV_NEWTON_THRESHOLD 230
#define REDC_1_TO_REDC_2_THRESHOLD 32
#define REDC_2_TO_REDC_N_THRESHOLD 55
#define MU_DIV_QR_THRESHOLD 1387
#define MU_DIVAPPR_Q_THRESHOLD 1387
#define MUPI_DIV_QR_THRESHOLD 92
#define MU_BDIV_QR_THRESHOLD 1142
#define MU_BDIV_Q_THRESHOLD 1334
#define POWM_SEC_TABLE 1,22,194,434,452
#define GET_STR_DC_THRESHOLD 13
#define GET_STR_PRECOMPUTE_THRESHOLD 20
#define SET_STR_DC_THRESHOLD 438
#define SET_STR_PRECOMPUTE_THRESHOLD 1254
#define FAC_DSC_THRESHOLD 189
#define FAC_ODD_THRESHOLD 26
#define MATRIX22_STRASSEN_THRESHOLD 14
#define HGCD2_DIV1_METHOD 3 /* 2.31% faster than 4 */
#define HGCD_THRESHOLD 104
#define HGCD_APPR_THRESHOLD 52
#define HGCD_REDUCE_THRESHOLD 2681
#define GCD_DC_THRESHOLD 465
#define GCDEXT_DC_THRESHOLD 283
#define JACOBI_BASE_METHOD 4 /* 5.81% faster than 1 */
/* Tuneup completed successfully, took 554602 seconds */

206
blender-5.2.0/extern/gmp-source/mpn/x86_64/bd1/hamdist.asm vendored Normal file
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dnl AMD64 SSSE3/XOP mpn_hamdist -- hamming distance.
dnl Copyright 2010-2017 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/limb good for cpu?
C AMD K8,K9 n/a
C AMD K10 n/a
C AMD bd1 1.51-2.0 y
C AMD bd2 1.50-1.9 y
C AMD bd3 ?
C AMD bd4 ?
C AMD zen n/a
C AMD bobcat n/a
C AMD jaguar n/a
C Intel P4 n/a
C Intel PNR n/a
C Intel NHM n/a
C Intel SBR n/a
C Intel IBR n/a
C Intel HWL n/a
C Intel BWL n/a
C Intel SKL n/a
C Intel atom n/a
C Intel SLM n/a
C VIA nano n/a
C TODO
C * We need to use .byte for vpshlb, vpperm, vphaddubq, and all popcnt if we
C intend to support old systems.
C We use vpshlb and vpperm below, which are XOP extensions to AVX. Some
C systems, e.g., NetBSD, set OSXSAVE but nevertheless trigger SIGILL for AVX.
C We fall back to the core2 code.
ifdef(`GMP_AVX_NOT_REALLY_AVAILABLE',`
MULFUNC_PROLOGUE(mpn_hamdist)
include_mpn(`x86_64/core2/hamdist.asm')
',`
define(`up', `%rdi')
define(`vp', `%rsi')
define(`n', `%rdx')
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
ASM_START()
TEXT
ALIGN(32)
PROLOGUE(mpn_hamdist)
FUNC_ENTRY(3)
cmp $5, n
jl L(sma)
lea L(cnsts)(%rip), %r9
xor R32(%r10), R32(%r10)
test $8, R8(vp)
jz L(ali)
mov (up), %r8
xor (vp), %r8
add $8, up
add $8, vp
dec n
popcnt %r8, %r10
L(ali):
ifdef(`PIC', `define(`OFF1',16) define(`OFF2',32) define(`OFF3',48)',
`define(`OFF1',32) define(`OFF2',48) define(`OFF3',64)')
movdqa OFF1`'(%r9), %xmm7 C nibble counts table
movdqa OFF2`'(%r9), %xmm6 C splat shift counts
movdqa OFF3`'(%r9), %xmm5 C masks
pxor %xmm4, %xmm4
pxor %xmm8, %xmm8 C grand total count
mov R32(n), R32(%rax)
and $6, R32(%rax)
lea -64(up,%rax,8), up
lea -64(vp,%rax,8), vp
ifdef(`PIC',`
movslq (%r9,%rax,2), %r11
add %r9, %r11
jmp *%r11
',`
jmp *(%r9,%rax,4)
')
L(0): add $64, up
add $64, vp
sub $2, n
ALIGN(32)
L(top): lddqu (up), %xmm0
pxor (vp), %xmm0
.byte 0x8f,0xe9,0x48,0x94,0xc8 C vpshlb %xmm6, %xmm0, %xmm1
pand %xmm5, %xmm0
pand %xmm5, %xmm1
.byte 0x8f,0xe8,0x40,0xa3,0xd7,0x00 C vpperm %xmm0,%xmm7,%xmm7,%xmm2
.byte 0x8f,0xe8,0x40,0xa3,0xdf,0x10 C vpperm %xmm1,%xmm7,%xmm7,%xmm3
paddb %xmm2, %xmm3
paddb %xmm3, %xmm4
L(6): lddqu 16(up), %xmm0
pxor 16(vp), %xmm0
.byte 0x8f,0xe9,0x48,0x94,0xc8 C vpshlb %xmm6, %xmm0, %xmm1
pand %xmm5, %xmm0
pand %xmm5, %xmm1
.byte 0x8f,0xe8,0x40,0xa3,0xd7,0x00 C vpperm %xmm0,%xmm7,%xmm7,%xmm2
.byte 0x8f,0xe8,0x40,0xa3,0xdf,0x10 C vpperm %xmm1,%xmm7,%xmm7,%xmm3
paddb %xmm2, %xmm3
paddb %xmm3, %xmm4
L(4): lddqu 32(up), %xmm0
pxor 32(vp), %xmm0
.byte 0x8f,0xe9,0x48,0x94,0xc8 C vpshlb %xmm6, %xmm0, %xmm1
pand %xmm5, %xmm0
pand %xmm5, %xmm1
.byte 0x8f,0xe8,0x40,0xa3,0xd7,0x00 C vpperm %xmm0,%xmm7,%xmm7,%xmm2
.byte 0x8f,0xe9,0x78,0xd3,0xc4 C vphaddubq %xmm4, %xmm0
.byte 0x8f,0xe8,0x40,0xa3,0xe7,0x10 C vpperm %xmm1,%xmm7,%xmm7,%xmm4
paddb %xmm2, %xmm3
paddb %xmm2, %xmm4
paddq %xmm0, %xmm8 C sum to 2 x 64-bit counts
L(2): mov 48(up), %r8
mov 56(up), %r9
add $64, up
xor 48(vp), %r8
xor 56(vp), %r9
add $64, vp
popcnt %r8, %r8
popcnt %r9, %r9
add %r8, %r10
add %r9, %r10
sub $8, n
jg L(top)
test $1, R8(n)
jz L(x)
mov (up), %r8
xor (vp), %r8
popcnt %r8, %r8
add %r8, %r10
L(x): .byte 0x8f,0xe9,0x78,0xd3,0xc4 C vphaddubq %xmm4, %xmm0
paddq %xmm0, %xmm8
pshufd $14, %xmm8, %xmm0
paddq %xmm8, %xmm0
movd %xmm0, %rax
add %r10, %rax
FUNC_EXIT()
ret
L(sma): mov (up), %r8
xor (vp), %r8
popcnt %r8, %rax
dec n
jz L(ed)
L(tp): mov 8(up), %r8
add $8, up
xor 8(vp), %r8
add $8, vp
popcnt %r8, %r8
add %r8, %rax
dec n
jnz L(tp)
L(ed): FUNC_EXIT()
ret
EPILOGUE()
DEF_OBJECT(L(cnsts),16,`JUMPTABSECT')
JMPENT( L(0), L(cnsts))
JMPENT( L(2), L(cnsts))
JMPENT( L(4), L(cnsts))
JMPENT( L(6), L(cnsts))
.byte 0x00,0x01,0x01,0x02,0x01,0x02,0x02,0x03
.byte 0x01,0x02,0x02,0x03,0x02,0x03,0x03,0x04
.byte -4,-4,-4,-4,-4,-4,-4,-4
.byte -4,-4,-4,-4,-4,-4,-4,-4
.byte 0x0f,0x0f,0x0f,0x0f,0x0f,0x0f,0x0f,0x0f
.byte 0x0f,0x0f,0x0f,0x0f,0x0f,0x0f,0x0f,0x0f
END_OBJECT(L(cnsts))
')

193
blender-5.2.0/extern/gmp-source/mpn/x86_64/bd1/mul_1.asm vendored Normal file
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dnl AMD64 mpn_mul_1 optimised for AMD Bulldozer.
dnl Copyright 2003-2005, 2007, 2008, 2011-2013 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/limb
C AMD K8,K9 3.65
C AMD K10 3.30 3.68
C AMD bull 4.04 4.29
C AMD pile 4.33
C AMD steam
C AMD excavator
C AMD bobcat 5.73
C AMD jaguar 5.87
C Intel P4 12.5
C Intel core2 4.38
C Intel NHM 4.28
C Intel SBR 2.69
C Intel IBR 2.55
C Intel HWL 2.41
C Intel BWL 2.49
C Intel SKL 2.50
C Intel atom 20.3
C Intel SLM 7.8
C VIA nano 4.25
C The loop of this code is the result of running a code generation and
C optimisation tool suite written by David Harvey and Torbjorn Granlund.
C TODO
C * Move loop code into feed-in blocks, to save insn for zeroing regs.
define(`rp', `%rdi') C rcx
define(`up', `%rsi') C rdx
define(`n_param', `%rdx') C r8
define(`v0', `%rcx') C r9
define(`n', `%rbx')
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
IFDOS(` define(`up', ``%rsi'') ') dnl
IFDOS(` define(`rp', ``%rcx'') ') dnl
IFDOS(` define(`v0', ``%r9'') ') dnl
IFDOS(` define(`r9', ``rdi'') ') dnl
IFDOS(` define(`n', ``%r8'') ') dnl
IFDOS(` define(`r8', ``rbx'') ') dnl
ASM_START()
TEXT
ALIGN(16)
PROLOGUE(mpn_mul_1c)
IFDOS(``push %rsi '')
IFDOS(``push %rdi '')
IFDOS(``mov %rdx, %rsi '')
mov (up), %rax C read first u limb early
push %rbx
IFSTD(` mov n_param, %r11 ') C move away n from rdx, mul uses it
IFDOS(` mov n, %r11 ')
mul v0
IFSTD(` add %r8, %rax ')
IFDOS(` add 64(%rsp), %rax ') C 40 + 3*8 (3 push insns)
adc $0, %rdx
jmp L(common)
EPILOGUE()
ALIGN(16)
PROLOGUE(mpn_mul_1)
IFDOS(``push %rsi '')
IFDOS(``push %rdi '')
IFDOS(``mov %rdx, %rsi '')
mov (up), %rax C read first u limb early
push %rbx
IFSTD(` mov n_param, %r11 ') C move away n from rdx, mul uses it
IFDOS(` mov n, %r11 ')
mul v0
L(common):
IFSTD(` mov %r11, n ')
and $3, R32(%r11)
lea -16(rp,n,8), rp
jz L(b0)
cmp $2, R32(%r11)
jb L(b1)
jz L(b2)
L(b3): mov %rax, %r10
mov %rdx, %r11
mov 8(up), %rax
mul v0
lea (up,n,8), up
not n
jmp L(L3)
L(b0): mov %rax, %r9
mov %rdx, %r10
mov 8(up), %rax
lea (up,n,8), up
neg n
jmp L(L0)
L(b1): mov %rax, %r8
cmp $1, n
jz L(n1)
mov %rdx, %r9
lea (up,n,8), up
neg n
mov %r8, 16(rp,n,8)
inc n
jmp L(L1)
L(b2): mov %rax, %r11
mov %rdx, %r8
mov 8(up), %rax
lea (up,n,8), up
neg n
add $2, n
jns L(end)
ALIGN(16)
L(top): mul v0
mov %rdx, %r9
add %rax, %r8
adc $0, %r9
mov %r8, 8(rp,n,8)
mov %r11, (rp,n,8)
L(L1): mov (up,n,8), %rax
mul v0
add %rax, %r9
mov %rdx, %r10
mov 8(up,n,8), %rax
adc $0, %r10
L(L0): mul v0
add %rax, %r10
mov %rdx, %r11
mov 16(up,n,8), %rax
adc $0, %r11
mul v0
mov %r9, 16(rp,n,8)
L(L3): add %rax, %r11
mov %r10, 24(rp,n,8)
mov %rdx, %r8
adc $0, %r8
add $4, n
mov -8(up,n,8), %rax
js L(top)
L(end): mul v0
add %rax, %r8
adc $0, %rdx
mov %r11, (rp)
L(n1): mov %r8, 8(rp)
mov %rdx, %rax
pop %rbx
IFDOS(``pop %rdi '')
IFDOS(``pop %rsi '')
ret
EPILOGUE()
ASM_END()

195
blender-5.2.0/extern/gmp-source/mpn/x86_64/bd1/mul_2.asm vendored Normal file
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@@ -0,0 +1,195 @@
dnl AMD64 mpn_mul_2 optimised for AMD Bulldozer.
dnl Contributed to the GNU project by Torbjörn Granlund.
dnl Copyright 2008, 2011-2013 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/limb
C AMD K8,K9 6.78
C AMD K10 6.78
C AMD bd1 8.39 8.65
C AMD bd2 8.47
C AMD bd3
C AMD bd4
C AMD zen
C AMD bt1 12.1
C AMD bt2 11.5
C Intel P4 24.0
C Intel PNR 8.14
C Intel NHM 7.78
C Intel SBR 6.34
C Intel IBR 6.15
C Intel HWL 6.04
C Intel BWL 4.33
C Intel SKL 4.41
C Intel atom 39.5
C Intel SLM 27.8
C VIA nano
C The loop of this code is the result of running a code generation and
C optimisation tool suite written by David Harvey and Torbjorn Granlund.
define(`rp', `%rdi') C rcx
define(`up', `%rsi') C rdx
define(`n_param', `%rdx') C r8
define(`vp', `%rcx') C r9
define(`v0', `%r8')
define(`v1', `%r9')
define(`w0', `%rbx')
define(`w1', `%rcx')
define(`w2', `%rbp')
define(`w3', `%r10')
define(`n', `%r11')
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
ASM_START()
TEXT
ALIGN(32)
PROLOGUE(mpn_mul_2)
FUNC_ENTRY(4)
push %rbx
push %rbp
mov (up), %rax
mov (vp), v0
mov 8(vp), v1
lea (up,n_param,8), up
lea (rp,n_param,8), rp
mov n_param, n
mul v0
neg n
test $1, R8(n)
jnz L(bx1)
L(bx0): test $2, R8(n)
jnz L(b10)
L(b00): mov %rax, w0
mov %rdx, w1
xor R32(w2), R32(w2)
mov (up,n,8), %rax
jmp L(lo0)
L(b10): mov %rax, w2
mov %rdx, w3
mov (up,n,8), %rax
xor R32(w0), R32(w0)
mul v1
add $-2, n
jmp L(lo2)
L(bx1): test $2, R8(n)
jz L(b11)
L(b01): mov %rax, w3
mov %rdx, w0
mov (up,n,8), %rax
mul v1
xor R32(w1), R32(w1)
inc n
jmp L(lo1)
L(b11): mov %rax, w1
mov %rdx, w2
mov (up,n,8), %rax
xor R32(w3), R32(w3)
dec n
jmp L(lo3)
ALIGN(32)
L(top): mov -8(up,n,8), %rax
mul v1
mov w2, -16(rp,n,8)
L(lo1): add %rax, w0
mov w3, -8(rp,n,8)
adc %rdx, w1
mov (up,n,8), %rax
mul v0
mov $0, R32(w2)
add %rax, w0
adc %rdx, w1
adc $0, R32(w2)
mov (up,n,8), %rax
L(lo0): mul v1
add %rax, w1
adc %rdx, w2
mov 8(up,n,8), %rax
mul v0
add %rax, w1
mov w0, (rp,n,8)
mov $0, R32(w3)
mov 8(up,n,8), %rax
adc %rdx, w2
adc $0, R32(w3)
L(lo3): mul v1
add %rax, w2
mov 16(up,n,8), %rax
adc %rdx, w3
mul v0
add %rax, w2
mov 16(up,n,8), %rax
mov $0, R32(w0)
adc %rdx, w3
adc $0, R32(w0)
mul v1
mov w1, 8(rp,n,8)
L(lo2): add %rax, w3
adc %rdx, w0
mov 24(up,n,8), %rax
mul v0
add %rax, w3
adc %rdx, w0
mov $0, R32(w1)
adc $0, R32(w1)
add $4, n
jnc L(top)
L(end): mov -8(up), %rax
mul v1
mov w2, -16(rp)
add %rax, w0
mov w3, -8(rp)
adc %rdx, w1
mov w0, (rp)
mov w1, %rax
pop %rbp
pop %rbx
FUNC_EXIT()
ret
EPILOGUE()

416
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dnl AMD64 mpn_mul_basecase optimised for AMD Bulldozer and Piledriver.
dnl Contributed to the GNU project by Torbjörn Granlund.
dnl Copyright 2003-2005, 2007, 2008, 2011-2013 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/limb mul_1 mul_2 mul_3 addmul_2
C AMD K8,K9
C AMD K10
C AMD bull ~4.8 ~4.55 - ~4.3
C AMD pile ~4.6 ~4.55 - ~4.55
C AMD bobcat
C AMD jaguar
C Intel P4
C Intel core
C Intel NHM
C Intel SBR
C Intel IBR
C Intel HWL
C Intel BWL
C Intel atom
C VIA nano
C The inner loops of this code are the result of running a code generation and
C optimisation tool suite written by David Harvey and Torbjorn Granlund.
C TODO
C * Merge bull-specific mul_1, if it is not slower the TOOM22 range.
C Alternatively, we could tweak the present code (which was loopmixed for a
C different CPU).
C * Merge faster mul_2, such as the one in the same directory as this file.
C * Further micro-optimise.
C When playing with pointers, set this to $2 to fall back to conservative
C indexing in wind-down code.
define(`I',`$1')
define(`rp', `%rdi')
define(`up', `%rsi')
define(`un_param',`%rdx')
define(`vp', `%rcx')
define(`vn', `%r8')
define(`un', `%rbx')
define(`w0', `%r10')
define(`w1', `%r11')
define(`w2', `%r12')
define(`w3', `%r13')
define(`n', `%rbp')
define(`v0', `%r9')
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
ASM_START()
TEXT
ALIGN(16)
PROLOGUE(mpn_mul_basecase)
FUNC_ENTRY(4)
IFDOS(` mov 56(%rsp), %r8d ')
push %rbx
push %rbp
mov un_param, un C free up rdx
neg un
mov (up), %rax C shared for mul_1 and mul_2
lea (up,un_param,8), up C point at operand end
lea (rp,un_param,8), rp C point at rp[un-1]
mov (vp), v0 C shared for mul_1 and mul_2
mul v0 C shared for mul_1 and mul_2
test $1, R8(vn)
jz L(do_mul_2)
L(do_mul_1):
test $1, R8(un)
jnz L(m1x1)
L(m1x0):mov %rax, w0 C un = 2, 4, 6, 8, ...
mov %rdx, w1
mov 8(up,un,8), %rax
test $2, R8(un)
jnz L(m110)
L(m100):lea 2(un), n C un = 4, 8, 12, ...
jmp L(m1l0)
L(m110):lea (un), n C un = 2, 6, 10, ...
jmp L(m1l2)
L(m1x1):mov %rax, w1 C un = 1, 3, 5, 7, ...
mov %rdx, w0
test $2, R8(un)
jz L(m111)
L(m101):lea 3(un), n C un = 1, 5, 9, ...
test n, n
js L(m1l1)
mov %rax, -8(rp)
mov %rdx, (rp)
pop %rbp
pop %rbx
FUNC_EXIT()
ret
L(m111):lea 1(un), n C un = 3, 7, 11, ...
mov 8(up,un,8), %rax
jmp L(m1l3)
ALIGN(16)
L(m1tp):mov %rdx, w0
add %rax, w1
L(m1l1):mov -16(up,n,8), %rax
adc $0, w0
mul v0
add %rax, w0
mov w1, -24(rp,n,8)
mov -8(up,n,8), %rax
mov %rdx, w1
adc $0, w1
L(m1l0):mul v0
mov w0, -16(rp,n,8)
add %rax, w1
mov %rdx, w0
mov (up,n,8), %rax
adc $0, w0
L(m1l3):mul v0
mov w1, -8(rp,n,8)
mov %rdx, w1
add %rax, w0
mov 8(up,n,8), %rax
adc $0, w1
L(m1l2):mul v0
mov w0, (rp,n,8)
add $4, n
jnc L(m1tp)
L(m1ed):add %rax, w1
adc $0, %rdx
mov w1, I(-8(rp),-24(rp,n,8))
mov %rdx, I((rp),-16(rp,n,8))
dec R32(vn)
jz L(ret2)
lea 8(vp), vp
lea 8(rp), rp
push %r12
push %r13
push %r14
jmp L(do_addmul)
L(do_mul_2):
define(`v1', `%r14')
push %r12
push %r13
push %r14
mov 8(vp), v1
test $1, R8(un)
jnz L(m2b1)
L(m2b0):lea (un), n
mov %rax, w2 C 0
mov (up,un,8), %rax
mov %rdx, w1 C 1
mul v1
mov %rax, w0 C 1
mov w2, (rp,un,8) C 0
mov 8(up,un,8), %rax
mov %rdx, w2 C 2
jmp L(m2l0)
L(m2b1):lea 1(un), n
mov %rax, w0 C 1
mov %rdx, w3 C 2
mov (up,un,8), %rax
mul v1
mov w0, (rp,un,8) C 1
mov %rdx, w0 C 3
mov %rax, w2 C 0
mov 8(up,un,8), %rax
jmp L(m2l1)
ALIGN(32)
L(m2tp):add %rax, w2 C 0
mov (up,n,8), %rax
adc $0, w0 C 1
L(m2l1):mul v0
add %rax, w2 C 0
mov (up,n,8), %rax
mov %rdx, w1 C 1
adc $0, w1 C 1
mul v1
add w3, w2 C 0
adc $0, w1 C 1
add %rax, w0 C 1
mov w2, (rp,n,8) C 0
mov 8(up,n,8), %rax
mov %rdx, w2 C 2
adc $0, w2 C 2
L(m2l0):mul v0
add %rax, w0 C 1
mov %rdx, w3 C 2
adc $0, w3 C 2
add w1, w0 C 1
adc $0, w3 C 2
mov 8(up,n,8), %rax
mul v1
add $2, n
mov w0, -8(rp,n,8) C 1
mov %rdx, w0 C 3
jnc L(m2tp)
L(m2ed):add %rax, w2
adc $0, %rdx
add w3, w2
adc $0, %rdx
mov w2, I((rp),(rp,n,8))
mov %rdx, I(8(rp),8(rp,n,8))
add $-2, R32(vn)
jz L(ret5)
lea 16(vp), vp
lea 16(rp), rp
L(do_addmul):
push %r15
push vn C save vn in new stack slot
define(`vn', `(%rsp)')
define(`X0', `%r14')
define(`X1', `%r15')
define(`v1', `%r8')
L(outer):
mov (vp), v0
mov 8(vp), v1
mov (up,un,8), %rax
mul v0
test $1, R8(un)
jnz L(bx1)
L(bx0): mov %rax, X1
mov (up,un,8), %rax
mov %rdx, X0
mul v1
test $2, R8(un)
jnz L(b10)
L(b00): lea (un), n C un = 4, 8, 12, ...
mov (rp,un,8), w3
mov %rax, w0
mov 8(up,un,8), %rax
mov %rdx, w1
jmp L(lo0)
L(b10): lea 2(un), n C un = 2, 6, 10, ...
mov (rp,un,8), w1
mov %rdx, w3
mov %rax, w2
mov 8(up,un,8), %rax
jmp L(lo2)
L(bx1): mov %rax, X0
mov (up,un,8), %rax
mov %rdx, X1
mul v1
test $2, R8(un)
jz L(b11)
L(b01): lea 1(un), n C un = 1, 5, 9, ...
mov (rp,un,8), w2
mov %rdx, w0
mov %rax, w3
jmp L(lo1)
L(b11): lea -1(un), n C un = 3, 7, 11, ...
mov (rp,un,8), w0
mov %rax, w1
mov 8(up,un,8), %rax
mov %rdx, w2
jmp L(lo3)
ALIGN(32)
L(top):
L(lo2): mul v0
add w1, X1
mov X1, -16(rp,n,8)
mov %rdx, X1
adc %rax, X0
adc $0, X1
mov -8(up,n,8), %rax
mul v1
mov -8(rp,n,8), w1
mov %rdx, w0
add w1, w2
adc %rax, w3
adc $0, w0
L(lo1): mov (up,n,8), %rax
mul v0
add w2, X0
mov X0, -8(rp,n,8)
mov %rdx, X0
adc %rax, X1
mov (up,n,8), %rax
adc $0, X0
mov (rp,n,8), w2
mul v1
add w2, w3
adc %rax, w0
mov 8(up,n,8), %rax
mov %rdx, w1
adc $0, w1
L(lo0): mul v0
add w3, X1
mov X1, (rp,n,8)
adc %rax, X0
mov 8(up,n,8), %rax
mov %rdx, X1
adc $0, X1
mov 8(rp,n,8), w3
mul v1
add w3, w0
adc %rax, w1
mov 16(up,n,8), %rax
mov %rdx, w2
adc $0, w2
L(lo3): mul v0
add w0, X0
mov X0, 8(rp,n,8)
mov %rdx, X0
adc %rax, X1
adc $0, X0
mov 16(up,n,8), %rax
mov 16(rp,n,8), w0
mul v1
mov %rdx, w3
add w0, w1
adc %rax, w2
adc $0, w3
mov 24(up,n,8), %rax
add $4, n
jnc L(top)
L(end): mul v0
add w1, X1
mov X1, I(-16(rp),-16(rp,n,8))
mov %rdx, X1
adc %rax, X0
adc $0, X1
mov I(-8(up),-8(up,n,8)), %rax
mul v1
mov I(-8(rp),-8(rp,n,8)), w1
add w1, w2
adc %rax, w3
adc $0, %rdx
add w2, X0
adc $0, X1
mov X0, I(-8(rp),-8(rp,n,8))
add w3, X1
mov X1, I((rp),(rp,n,8))
adc $0, %rdx
mov %rdx, I(8(rp),8(rp,n,8))
addl $-2, vn
lea 16(vp), vp
lea 16(rp), rp
jnz L(outer)
pop %rax C deallocate vn slot
pop %r15
L(ret5):pop %r14
pop %r13
pop %r12
L(ret2):pop %rbp
pop %rbx
FUNC_EXIT()
ret
EPILOGUE()

191
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dnl AMD64 SSSE3/XOP mpn_popcount -- population count.
dnl Copyright 2010-2017 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/limb good for cpu?
C AMD K8,K9 n/a
C AMD K10 n/a
C AMD bd1 1.27 y
C AMD bd2 1.24 y
C AMD bd3 ?
C AMD bd4 1.22
C AMD zen n/a
C AMD bobcat n/a
C AMD jaguar n/a
C Intel P4 n/a
C Intel CNR n/a
C Intel PNR n/a
C Intel NHM n/a
C Intel SBR n/a
C Intel IBR n/a
C Intel HWL n/a
C Intel BWL n/a
C Intel SKL n/a
C Intel atom n/a
C Intel SLM n/a
C VIA nano n/a
C TODO
C * We need to use .byte for vpshlb, vpperm, vphaddubq, and all popcnt if we
C intend to support old systems.
C We use vpshlb and vpperm below, which are XOP extensions to AVX. Some
C systems, e.g., NetBSD, set OSXSAVE but nevertheless trigger SIGILL for AVX.
C We fall back to the core2 code.
ifdef(`GMP_AVX_NOT_REALLY_AVAILABLE',`
MULFUNC_PROLOGUE(mpn_popcount)
include_mpn(`x86_64/core2/popcount.asm')
',`
define(`up', `%rdi')
define(`n', `%rsi')
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
ASM_START()
TEXT
ALIGN(32)
PROLOGUE(mpn_popcount)
FUNC_ENTRY(3)
lea L(cnsts)(%rip), %r9
ifdef(`PIC', `define(`OFF1',32) define(`OFF2',48) define(`OFF3',64)',
`define(`OFF1',64) define(`OFF2',80) define(`OFF3',96)')
movdqa OFF1`'(%r9), %xmm7 C nibble counts table
movdqa OFF2`'(%r9), %xmm6 C splat shift counts
movdqa OFF3`'(%r9), %xmm9 C masks
pxor %xmm4, %xmm4
pxor %xmm5, %xmm5 C 0-reg
pxor %xmm8, %xmm8 C grand total count
xor R32(%rdx), R32(%rdx)
mov R32(n), R32(%rax)
and $7, R32(%rax)
ifdef(`PIC',`
movslq (%r9,%rax,4), %rax
add %r9, %rax
jmp *%rax
',`
jmp *(%r9,%rax,8)
')
L(1): .byte 0xf3,0x48,0x0f,0xb8,0x17 C popcnt (up),%rdx
add $8, up
dec n
jnz L(top)
mov %rdx, %rax
FUNC_EXIT()
ret
L(2): add $-48, up
jmp L(e2)
L(3): .byte 0xf3,0x48,0x0f,0xb8,0x17 C popcnt (up), %rdx
add $-40, up
jmp L(e2)
L(4): add $-32, up
jmp L(e4)
L(5): .byte 0xf3,0x48,0x0f,0xb8,0x17 C popcnt (up), %rdx
add $-24, up
jmp L(e4)
L(6): add $-16, up
jmp L(e6)
L(7): .byte 0xf3,0x48,0x0f,0xb8,0x17 C popcnt (up), %rdx
add $-8, up
jmp L(e6)
ALIGN(32)
L(top): lddqu (up), %xmm0
.byte 0x8f,0xe9,0x48,0x94,0xc8 C vpshlb %xmm6, %xmm0, %xmm1
pand %xmm9, %xmm0
pand %xmm9, %xmm1
.byte 0x8f,0xe8,0x40,0xa3,0xd7,0x00 C vpperm %xmm0,%xmm7,%xmm7,%xmm2
.byte 0x8f,0xe8,0x40,0xa3,0xdf,0x10 C vpperm %xmm1, %xmm7, %xmm7, %xmm3
paddb %xmm2, %xmm3
paddb %xmm3, %xmm4
L(e6): lddqu 16(up), %xmm0
.byte 0x8f,0xe9,0x48,0x94,0xc8 C vpshlb %xmm6, %xmm0, %xmm1
pand %xmm9, %xmm0
pand %xmm9, %xmm1
.byte 0x8f,0xe8,0x40,0xa3,0xd7,0x00 C vpperm %xmm0,%xmm7,%xmm7,%xmm2
.byte 0x8f,0xe8,0x40,0xa3,0xdf,0x10 C vpperm %xmm1,%xmm7,%xmm7,%xmm3
paddb %xmm2, %xmm3
paddb %xmm3, %xmm4
L(e4): lddqu 32(up), %xmm0
.byte 0x8f,0xe9,0x48,0x94,0xc8 C vpshlb %xmm6, %xmm0, %xmm1
pand %xmm9, %xmm0
pand %xmm9, %xmm1
.byte 0x8f,0xe8,0x40,0xa3,0xd7,0x00 C vpperm %xmm0, %xmm7, %xmm7, %xmm2
.byte 0x8f,0xe9,0x78,0xd3,0xec C vphaddubq %xmm4, %xmm5
.byte 0x8f,0xe8,0x40,0xa3,0xe7,0x10 C vpperm %xmm1,%xmm7,%xmm7,%xmm4
paddb %xmm2, %xmm4
L(e2): popcnt 48(up), %r8
popcnt 56(up), %r9
add $64, up
paddq %xmm5, %xmm8 C sum to 2 x 64-bit counts
add %r8, %rdx
add %r9, %rdx
sub $8, n
jg L(top)
.byte 0x8f,0xe9,0x78,0xd3,0xec C vphaddubq %xmm4, %xmm5
paddq %xmm5, %xmm8
pshufd $14, %xmm8, %xmm0
paddq %xmm8, %xmm0
movd %xmm0, %rax
add %rdx, %rax
FUNC_EXIT()
ret
EPILOGUE()
DEF_OBJECT(L(cnsts),16,`JUMPTABSECT')
JMPENT( L(top), L(cnsts))
JMPENT( L(1), L(cnsts))
JMPENT( L(2), L(cnsts))
JMPENT( L(3), L(cnsts))
JMPENT( L(4), L(cnsts))
JMPENT( L(5), L(cnsts))
JMPENT( L(6), L(cnsts))
JMPENT( L(7), L(cnsts))
.byte 0x00,0x01,0x01,0x02,0x01,0x02,0x02,0x03
.byte 0x01,0x02,0x02,0x03,0x02,0x03,0x03,0x04
.byte -4,-4,-4,-4,-4,-4,-4,-4
.byte -4,-4,-4,-4,-4,-4,-4,-4
.byte 0x0f,0x0f,0x0f,0x0f,0x0f,0x0f,0x0f,0x0f
.byte 0x0f,0x0f,0x0f,0x0f,0x0f,0x0f,0x0f,0x0f
END_OBJECT(L(cnsts))
')

37
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dnl X86-64 mpn_sec_tabselect.
dnl Copyright 2012, 2013 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
MULFUNC_PROLOGUE(mpn_sec_tabselect)
include_mpn(`x86_64/fastsse/sec_tabselect.asm')

37
blender-5.2.0/extern/gmp-source/mpn/x86_64/bd1/sublsh1_n.asm vendored Normal file
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dnl AMD64 mpn_sublsh1_n
dnl Copyright 2013 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
MULFUNC_PROLOGUE(mpn_sublsh1_n mpn_sublsh1_nc)
include_mpn(`x86_64/atom/sublsh1_n.asm')

96
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dnl AMD64 mpn_gcd_11 optimised for AMD BD2, BD3, BT2.
dnl Based on the K7 gcd_1.asm, by Kevin Ryde. Rehacked for AMD64 by Torbjorn
dnl Granlund.
dnl Copyright 2000-2002, 2005, 2009, 2011, 2012, 2017, 2019 Free Software
dnl Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/bit (approx)
C AMD K8,K9 ?
C AMD K10 ?
C AMD bd1 5.4
C AMD bd2 3.72
C AMD bd3 ?
C AMD bd4 4.12
C AMD bt1 9.0
C AMD bt2 3.97
C AMD zn1 3.36
C AMD zn2 3.33
C Intel P4 ?
C Intel CNR ?
C Intel PNR ?
C Intel NHM ?
C Intel WSM ?
C Intel SBR ?
C Intel IBR ?
C Intel HWL ?
C Intel BWL ?
C Intel SKL ?
C Intel atom ?
C Intel SLM ?
C Intel GLM ?
C Intel GLM+ ?
C VIA nano ?
define(`u0', `%rdi')
define(`v0', `%rsi')
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
ASM_START()
TEXT
ALIGN(64)
PROLOGUE(mpn_gcd_11)
FUNC_ENTRY(2)
mov v0, %rdx
sub u0, %rdx
jz L(end)
ALIGN(16)
L(top): rep;bsf %rdx, %rcx C tzcnt!
mov u0, %rax
sub v0, u0 C u - v
cmovc %rdx, u0 C u = |u - v|
cmovc %rax, v0 C v = min(u,v)
shr R8(%rcx), u0
mov v0, %rdx
sub u0, %rdx C v - u
jnz L(top)
L(end): mov v0, %rax
C rax = result
C rdx = 0 for the benefit of internal gcd_22 call
FUNC_EXIT()
ret
EPILOGUE()

142
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dnl AMD64 mpn_gcd_22. Assumes useless bsf, useless shrd, tzcnt, no shlx.
dnl Copyright 2019 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/bit
C AMD K8,K9 12.3
C AMD K10 8.0
C AMD bd1 10.0
C AMD bd2 7.2
C AMD bd3 ?
C AMD bd4 6.7
C AMD bt1 13.6
C AMD bt2 8.9
C AMD zn1 5.7
C AMD zn2 5.6
C Intel P4 ?
C Intel CNR 9.7
C Intel PNR 9.7
C Intel NHM 9.4
C Intel WSM 9.5
C Intel SBR 10.3
C Intel IBR ?
C Intel HWL 8.2
C Intel BWL 7.4
C Intel SKL 7.3
C Intel atom 26.5
C Intel SLM 17.4
C Intel GLM 13.4
C Intel GLM+ 12.4
C VIA nano ?
define(`u1', `%rdi')
define(`u0', `%rsi')
define(`v1', `%rdx')
define(`v0_param', `%rcx')
define(`v0', `%rax')
define(`cnt', `%rcx')
define(`s0', `%r8')
define(`s1', `%r9')
define(`t0', `%r10')
define(`t1', `%r11')
dnl ABI_SUPPORT(DOS64) C returns mp_double_limb_t in memory
ABI_SUPPORT(STD64)
ASM_START()
TEXT
ALIGN(64)
PROLOGUE(mpn_gcd_22)
FUNC_ENTRY(4)
mov v0_param, v0
ALIGN(16)
L(top): mov v0, t0
sub u0, t0
jz L(lowz) C jump when low limb result = 0
mov v1, t1
sbb u1, t1
rep;bsf t0, cnt C tzcnt!
mov u0, s0
mov u1, s1
sub v0, u0
sbb v1, u1
L(bck): cmovc t0, u0 C u = |u - v|
cmovc t1, u1 C u = |u - v|
cmovc s0, v0 C v = min(u,v)
cmovc s1, v1 C v = min(u,v)
C Rightshift (u1,,u0) into (u1,,u0)
L(shr): shr R8(cnt), u0
mov u1, t1
shr R8(cnt), u1
neg cnt
shl R8(cnt), t1
or t1, u0
test v1, v1
jnz L(top)
test u1, u1
jnz L(top)
L(gcd_11):
mov v0, %rdi
C mov u0, %rsi
TCALL( mpn_gcd_11)
L(lowz):C We come here when v0 - u0 = 0
C 1. If v1 - u1 = 0, then gcd is u = v.
C 2. Else compute gcd_21({v1,v0}, |u1-v1|)
mov v1, t0
sub u1, t0
je L(end)
xor t1, t1
rep;bsf t0, cnt C tzcnt!
mov u0, s0
mov u1, s1
mov u1, u0
xor u1, u1
sub v1, u0
jmp L(bck)
L(end): C mov v0, %rax
C mov v1, %rdx
FUNC_EXIT()
ret
EPILOGUE()

263
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/* AMD bd2 gmp-mparam.h -- Compiler/machine parameter header file.
Copyright 2019 Free Software Foundation, Inc.
This file is part of the GNU MP Library.
The GNU MP Library is free software; you can redistribute it and/or modify
it under the terms of either:
* the GNU Lesser General Public License as published by the Free
Software Foundation; either version 3 of the License, or (at your
option) any later version.
or
* the GNU General Public License as published by the Free Software
Foundation; either version 2 of the License, or (at your option) any
later version.
or both in parallel, as here.
The GNU MP Library is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
for more details.
You should have received copies of the GNU General Public License and the
GNU Lesser General Public License along with the GNU MP Library. If not,
see https://www.gnu.org/licenses/. */
#define GMP_LIMB_BITS 64
#define GMP_LIMB_BYTES 8
/* 4000-4200 MHz Piledriver Vishera */
/* FFT tuning limit = 464,626,631 */
/* Generated by tuneup.c, 2019-10-18, gcc 8.3 */
#define MOD_1_NORM_THRESHOLD 0 /* always */
#define MOD_1_UNNORM_THRESHOLD 0 /* always */
#define MOD_1N_TO_MOD_1_1_THRESHOLD 6
#define MOD_1U_TO_MOD_1_1_THRESHOLD 3
#define MOD_1_1_TO_MOD_1_2_THRESHOLD 23
#define MOD_1_2_TO_MOD_1_4_THRESHOLD 34
#define PREINV_MOD_1_TO_MOD_1_THRESHOLD 12
#define USE_PREINV_DIVREM_1 1 /* native */
#define DIV_QR_1_NORM_THRESHOLD 2
#define DIV_QR_1_UNNORM_THRESHOLD MP_SIZE_T_MAX /* never */
#define DIV_QR_2_PI2_THRESHOLD MP_SIZE_T_MAX /* never */
#define DIVEXACT_1_THRESHOLD 0 /* always (native) */
#define BMOD_1_TO_MOD_1_THRESHOLD 22
#define DIV_1_VS_MUL_1_PERCENT 293
#define MUL_TOOM22_THRESHOLD 16
#define MUL_TOOM33_THRESHOLD 57
#define MUL_TOOM44_THRESHOLD 152
#define MUL_TOOM6H_THRESHOLD 230
#define MUL_TOOM8H_THRESHOLD 309
#define MUL_TOOM32_TO_TOOM43_THRESHOLD 97
#define MUL_TOOM32_TO_TOOM53_THRESHOLD 107
#define MUL_TOOM42_TO_TOOM53_THRESHOLD 105
#define MUL_TOOM42_TO_TOOM63_THRESHOLD 103
#define MUL_TOOM43_TO_TOOM54_THRESHOLD 142
#define SQR_BASECASE_THRESHOLD 0 /* always (native) */
#define SQR_TOOM2_THRESHOLD 20
#define SQR_TOOM3_THRESHOLD 73
#define SQR_TOOM4_THRESHOLD 200
#define SQR_TOOM6_THRESHOLD 286
#define SQR_TOOM8_THRESHOLD 430
#define MULMID_TOOM42_THRESHOLD 20
#define MULMOD_BNM1_THRESHOLD 11
#define SQRMOD_BNM1_THRESHOLD 13
#define MUL_FFT_MODF_THRESHOLD 372 /* k = 5 */
#define MUL_FFT_TABLE3 \
{ { 372, 5}, { 17, 6}, { 9, 5}, { 19, 6}, \
{ 10, 5}, { 21, 6}, { 11, 5}, { 23, 6}, \
{ 25, 7}, { 13, 6}, { 27, 7}, { 21, 8}, \
{ 11, 7}, { 25, 8}, { 13, 7}, { 27, 8}, \
{ 15, 7}, { 32, 8}, { 17, 7}, { 35, 8}, \
{ 21, 9}, { 11, 8}, { 27, 9}, { 15, 8}, \
{ 35, 9}, { 19, 8}, { 41, 9}, { 23, 8}, \
{ 47, 9}, { 27,10}, { 15, 9}, { 31, 8}, \
{ 63, 9}, { 39,10}, { 23, 9}, { 55,11}, \
{ 15,10}, { 31, 9}, { 71,10}, { 39, 9}, \
{ 83,10}, { 47, 9}, { 95,10}, { 55,11}, \
{ 31,10}, { 79,11}, { 47,10}, { 95,12}, \
{ 31,11}, { 63,10}, { 135,11}, { 79, 8}, \
{ 639, 9}, { 335,10}, { 175, 9}, { 351,10}, \
{ 191,12}, { 63,11}, { 127,10}, { 255,11}, \
{ 143,10}, { 287,11}, { 159,12}, { 95,11}, \
{ 191,13}, { 63,12}, { 127,11}, { 271,10}, \
{ 543,11}, { 287,12}, { 159,11}, { 351,12}, \
{ 191,11}, { 383,10}, { 767,11}, { 415,12}, \
{ 223,11}, { 447,13}, { 127,12}, { 255,11}, \
{ 511,10}, { 1023,11}, { 543,12}, { 287,11}, \
{ 575,12}, { 319,11}, { 639,10}, { 1279,12}, \
{ 351,13}, { 191,12}, { 383,11}, { 767,12}, \
{ 415,11}, { 831,10}, { 1663,12}, { 447,14}, \
{ 127,13}, { 255,12}, { 511,11}, { 1023,12}, \
{ 543,11}, { 1087,10}, { 2175,12}, { 575,11}, \
{ 1151,13}, { 319,12}, { 639,11}, { 1279,12}, \
{ 671,11}, { 1343,10}, { 2687,12}, { 703,11}, \
{ 1407,13}, { 383,12}, { 767,11}, { 1535,12}, \
{ 799,11}, { 1599,12}, { 831,11}, { 1663,13}, \
{ 447,12}, { 895,14}, { 255,13}, { 511,12}, \
{ 1087,11}, { 2175,13}, { 575,12}, { 1215,11}, \
{ 2431,10}, { 4863,13}, { 639,12}, { 1343,11}, \
{ 2687,13}, { 703,12}, { 1407,11}, { 2815,14}, \
{ 383,13}, { 767,12}, { 1599,13}, { 831,12}, \
{ 1727,11}, { 3455,13}, { 895,15}, { 255,14}, \
{ 511,13}, { 1087,12}, { 2175,13}, { 1215,12}, \
{ 2431,11}, { 4863,14}, { 639,13}, { 1343,12}, \
{ 2687,13}, { 1407,12}, { 2815,13}, { 1471,12}, \
{ 2943,11}, { 5887,14}, { 767,13}, { 1599,12}, \
{ 3199,13}, { 1727,12}, { 3455,14}, { 895,13}, \
{ 1791,12}, { 3583,13}, { 1919,12}, { 3839,11}, \
{ 7679,15}, { 511,14}, { 1023,13}, { 2175,14}, \
{ 1151,13}, { 2303,12}, { 4607,13}, { 2431,12}, \
{ 4863,14}, { 1279,13}, { 2687,14}, { 1407,13}, \
{ 2815,12}, { 5631,13}, { 2943,12}, { 5887,15}, \
{ 767,14}, { 1535,13}, { 3199,14}, { 1663,13}, \
{ 3455,12}, { 6911,14}, { 1791,13}, { 3583,14}, \
{ 1919,13}, { 3839,12}, { 7679,16}, { 511,15}, \
{ 1023,14}, { 2175,13}, { 4479,14}, { 2303,13}, \
{ 4607,14}, { 2431,13}, { 4863,15}, { 1279,14}, \
{ 2815,13}, { 5631,14}, { 2943,13}, { 5887,12}, \
{ 11775,15}, { 1535,14}, { 3455,13}, { 6911,15}, \
{ 1791,14}, { 3839,13}, { 7679,16}, { 1023,15}, \
{ 2047,14}, { 4479,13}, { 8959,15}, { 2303,14}, \
{ 4863,15}, { 2815,14}, { 5887,13}, { 11775,16}, \
{ 1535,15}, { 3327,14}, { 6911,15}, { 3839,14}, \
{ 7679,13}, { 15359,17}, { 1023,16}, { 2047,15}, \
{ 4351,14}, { 8959,15}, { 4863,16}, { 2559,15}, \
{ 5887,14}, { 11775,16}, { 3071,15}, { 6911,16}, \
{ 3583,15}, { 7679,14}, { 15359,15}, { 7935,14}, \
{ 15871,17}, { 2047,16}, { 4095,15}, { 8959,16}, \
{ 4607,15}, { 9983,14}, { 19967,16}, { 5631,15}, \
{ 11775,17}, { 3071,16}, { 65536,17}, { 131072,18}, \
{ 262144,19}, { 524288,20}, {1048576,21}, {2097152,22}, \
{4194304,23}, {8388608,24} }
#define MUL_FFT_TABLE3_SIZE 262
#define MUL_FFT_THRESHOLD 4544
#define SQR_FFT_MODF_THRESHOLD 344 /* k = 5 */
#define SQR_FFT_TABLE3 \
{ { 344, 5}, { 19, 6}, { 10, 5}, { 21, 6}, \
{ 11, 5}, { 23, 6}, { 25, 7}, { 13, 6}, \
{ 27, 7}, { 25, 8}, { 13, 7}, { 28, 8}, \
{ 15, 7}, { 31, 8}, { 17, 7}, { 35, 8}, \
{ 19, 7}, { 39, 8}, { 21, 9}, { 11, 8}, \
{ 27, 9}, { 15, 8}, { 35, 9}, { 19, 8}, \
{ 39, 9}, { 23, 8}, { 47, 9}, { 27,10}, \
{ 15, 9}, { 39,10}, { 23, 9}, { 51,11}, \
{ 15,10}, { 31, 9}, { 67,10}, { 39, 9}, \
{ 79,10}, { 47,11}, { 31,10}, { 79,11}, \
{ 47,10}, { 95,12}, { 31,11}, { 63,10}, \
{ 127, 9}, { 255,10}, { 135,11}, { 79,10}, \
{ 159,11}, { 95,10}, { 191,12}, { 63, 9}, \
{ 511,10}, { 271,11}, { 143,10}, { 303,11}, \
{ 159,12}, { 95,11}, { 191,13}, { 63,12}, \
{ 127,11}, { 287,10}, { 575,11}, { 303,12}, \
{ 159,11}, { 351,12}, { 191,11}, { 383,12}, \
{ 223,11}, { 447,13}, { 127,12}, { 255,11}, \
{ 511,10}, { 1023,12}, { 287,11}, { 575,10}, \
{ 1151,11}, { 607,12}, { 319,11}, { 639,10}, \
{ 1279,12}, { 351,13}, { 191,12}, { 383,11}, \
{ 767,12}, { 415,11}, { 831,10}, { 1663,12}, \
{ 447,14}, { 127,13}, { 255,12}, { 511,11}, \
{ 1023,12}, { 543,11}, { 1087,10}, { 2175,12}, \
{ 575,11}, { 1151,12}, { 607,13}, { 319,12}, \
{ 639,11}, { 1279,12}, { 671,11}, { 1343,10}, \
{ 2687,12}, { 703,11}, { 1407,13}, { 383,12}, \
{ 767,11}, { 1535,12}, { 799,11}, { 1599,12}, \
{ 831,11}, { 1663,13}, { 447,12}, { 895,14}, \
{ 255,13}, { 511,12}, { 1087,11}, { 2175,13}, \
{ 575,12}, { 1215,11}, { 2431,10}, { 4863,13}, \
{ 639,12}, { 1343,11}, { 2687,13}, { 703,12}, \
{ 1407,14}, { 383,13}, { 767,12}, { 1599,13}, \
{ 831,12}, { 1727,13}, { 895,15}, { 255,14}, \
{ 511,13}, { 1087,12}, { 2175,13}, { 1151,12}, \
{ 2303,13}, { 1215,12}, { 2431,11}, { 4863,14}, \
{ 639,13}, { 1343,12}, { 2687,13}, { 1407,12}, \
{ 2815,13}, { 1471,12}, { 2943,11}, { 5887,14}, \
{ 767,13}, { 1599,12}, { 3199,13}, { 1727,12}, \
{ 3455,14}, { 895,13}, { 1791,12}, { 3583,13}, \
{ 1919,12}, { 3839,15}, { 511,14}, { 1023,13}, \
{ 2175,14}, { 1151,13}, { 2303,12}, { 4607,13}, \
{ 2431,12}, { 4863,14}, { 1279,13}, { 2687,14}, \
{ 1407,13}, { 2943,12}, { 5887,11}, { 11775,15}, \
{ 767,14}, { 1535,13}, { 3199,14}, { 1663,13}, \
{ 3455,12}, { 6911,14}, { 1791,13}, { 3583,14}, \
{ 1919,13}, { 3839,16}, { 511,15}, { 1023,14}, \
{ 2175,13}, { 4479,14}, { 2303,13}, { 4607,14}, \
{ 2431,13}, { 4863,15}, { 1279,14}, { 2815,13}, \
{ 5631,14}, { 2943,13}, { 5887,12}, { 11775,15}, \
{ 1535,14}, { 3455,13}, { 6911,15}, { 1791,14}, \
{ 3839,13}, { 7679,16}, { 1023,15}, { 2047,14}, \
{ 4479,13}, { 8959,15}, { 2303,14}, { 4863,15}, \
{ 2815,14}, { 5887,13}, { 11775,16}, { 1535,15}, \
{ 3327,14}, { 6911,15}, { 3839,14}, { 7679,17}, \
{ 1023,16}, { 2047,15}, { 4351,14}, { 8959,15}, \
{ 4863,16}, { 2559,15}, { 5887,14}, { 11775,16}, \
{ 3071,15}, { 6911,16}, { 3583,15}, { 7679,14}, \
{ 15359,15}, { 7935,14}, { 15871,17}, { 2047,16}, \
{ 4095,15}, { 8959,16}, { 4607,15}, { 9983,14}, \
{ 19967,16}, { 5119,15}, { 10239,16}, { 5631,15}, \
{ 11775,17}, { 3071,16}, { 65536,17}, { 131072,18}, \
{ 262144,19}, { 524288,20}, {1048576,21}, {2097152,22}, \
{4194304,23}, {8388608,24} }
#define SQR_FFT_TABLE3_SIZE 254
#define SQR_FFT_THRESHOLD 2880
#define MULLO_BASECASE_THRESHOLD 0 /* always */
#define MULLO_DC_THRESHOLD 30
#define MULLO_MUL_N_THRESHOLD 8907
#define SQRLO_BASECASE_THRESHOLD 8
#define SQRLO_DC_THRESHOLD 53
#define SQRLO_SQR_THRESHOLD 5724
#define DC_DIV_QR_THRESHOLD 52
#define DC_DIVAPPR_Q_THRESHOLD 159
#define DC_BDIV_QR_THRESHOLD 44
#define DC_BDIV_Q_THRESHOLD 79
#define INV_MULMOD_BNM1_THRESHOLD 30
#define INV_NEWTON_THRESHOLD 172
#define INV_APPR_THRESHOLD 172
#define BINV_NEWTON_THRESHOLD 226
#define REDC_1_TO_REDC_2_THRESHOLD 40
#define REDC_2_TO_REDC_N_THRESHOLD 51
#define MU_DIV_QR_THRESHOLD 1308
#define MU_DIVAPPR_Q_THRESHOLD 1258
#define MUPI_DIV_QR_THRESHOLD 85
#define MU_BDIV_QR_THRESHOLD 1142
#define MU_BDIV_Q_THRESHOLD 1210
#define POWM_SEC_TABLE 3,16,129,523,1297
#define GET_STR_DC_THRESHOLD 13
#define GET_STR_PRECOMPUTE_THRESHOLD 20
#define SET_STR_DC_THRESHOLD 228
#define SET_STR_PRECOMPUTE_THRESHOLD 1033
#define FAC_DSC_THRESHOLD 172
#define FAC_ODD_THRESHOLD 28
#define MATRIX22_STRASSEN_THRESHOLD 19
#define HGCD2_DIV1_METHOD 1 /* 8.54% faster than 3 */
#define HGCD_THRESHOLD 108
#define HGCD_APPR_THRESHOLD 50
#define HGCD_REDUCE_THRESHOLD 2681
#define GCD_DC_THRESHOLD 393
#define GCDEXT_DC_THRESHOLD 278
#define JACOBI_BASE_METHOD 4 /* 13.69% faster than 1 */
/* Tuneup completed successfully, took 463931 seconds */

38
blender-5.2.0/extern/gmp-source/mpn/x86_64/bd4/aorrlsh_n.asm vendored Normal file
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@@ -0,0 +1,38 @@
dnl X86-64 mpn_addlsh_n and mpn_rsblsh_n.
dnl Copyright 2017 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
MULFUNC_PROLOGUE(mpn_addlsh_n mpn_rsblsh_n)
include_mpn(`x86_64/zen/aorrlsh_n.asm')

96
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dnl AMD64 mpn_gcd_11 optimised for AMD BD4, ZN1.
dnl Based on the K7 gcd_1.asm, by Kevin Ryde. Rehacked for AMD64 by Torbjorn
dnl Granlund.
dnl Copyright 2000-2002, 2005, 2009, 2011, 2012, 2017, 2019 Free Software
dnl Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/bit (approx)
C AMD K8,K9 -
C AMD K10 -
C AMD bd1 -
C AMD bd2 -
C AMD bd3 -
C AMD bd4 3.73
C AMD bt1 -
C AMD bt2 -
C AMD zn1 3.33
C AMD zn2 3.48
C Intel P4 -
C Intel CNR -
C Intel PNR -
C Intel NHM -
C Intel WSM -
C Intel SBR -
C Intel IBR -
C Intel HWL ?
C Intel BWL ?
C Intel SKL ?
C Intel atom -
C Intel SLM -
C Intel GLM -
C Intel GLM+ -
C VIA nano -
define(`u0', `%rdi')
define(`v0', `%rsi')
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
ASM_START()
TEXT
ALIGN(64)
PROLOGUE(mpn_gcd_11)
FUNC_ENTRY(2)
mov u0, %rax
mov v0, %rdx
sub u0, %rdx C v - u
jz L(end)
ALIGN(16)
L(top): rep;bsf %rdx, %rcx C tzcnt!
sub v0, u0 C u - v
cmovc %rdx, u0 C u = |u - v|
cmovc %rax, v0 C v = min(u,v)
shrx( %rcx, u0, %rax)
shrx( %rcx, u0, u0)
mov v0, %rdx
sub %rax, %rdx C v - u
jnz L(top)
L(end): C rax = result
C rdx = 0 for the benefit of internal gcd_22 call
FUNC_EXIT()
ret
EPILOGUE()

37
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dnl AMD64 mpn_gcd_22.
dnl Copyright 2019 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
dnl ABI_SUPPORT(DOS64) C returns mp_double_limb_t in memory
ABI_SUPPORT(STD64)
MULFUNC_PROLOGUE(mpn_gcd_22)
include_mpn(`x86_64/coreihwl/gcd_22.asm')

266
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/* AMD bd4 gmp-mparam.h -- Compiler/machine parameter header file.
Copyright 2019 Free Software Foundation, Inc.
This file is part of the GNU MP Library.
The GNU MP Library is free software; you can redistribute it and/or modify
it under the terms of either:
* the GNU Lesser General Public License as published by the Free
Software Foundation; either version 3 of the License, or (at your
option) any later version.
or
* the GNU General Public License as published by the Free Software
Foundation; either version 2 of the License, or (at your option) any
later version.
or both in parallel, as here.
The GNU MP Library is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
for more details.
You should have received copies of the GNU General Public License and the
GNU Lesser General Public License along with the GNU MP Library. If not,
see https://www.gnu.org/licenses/. */
#define GMP_LIMB_BITS 64
#define GMP_LIMB_BYTES 8
/* 3800-4200 MHz Excavator/Bristol Ridge */
/* FFT tuning limit = 461,179,335 */
/* Generated by tuneup.c, 2019-10-18, gcc 8.3 */
#define MOD_1_NORM_THRESHOLD 0 /* always */
#define MOD_1_UNNORM_THRESHOLD 0 /* always */
#define MOD_1N_TO_MOD_1_1_THRESHOLD 6
#define MOD_1U_TO_MOD_1_1_THRESHOLD 5
#define MOD_1_1_TO_MOD_1_2_THRESHOLD 17
#define MOD_1_2_TO_MOD_1_4_THRESHOLD 52
#define PREINV_MOD_1_TO_MOD_1_THRESHOLD 13
#define USE_PREINV_DIVREM_1 1 /* native */
#define DIV_QR_1_NORM_THRESHOLD 1
#define DIV_QR_1_UNNORM_THRESHOLD MP_SIZE_T_MAX /* never */
#define DIV_QR_2_PI2_THRESHOLD MP_SIZE_T_MAX /* never */
#define DIVEXACT_1_THRESHOLD 0 /* always (native) */
#define BMOD_1_TO_MOD_1_THRESHOLD 25
#define DIV_1_VS_MUL_1_PERCENT 298
#define MUL_TOOM22_THRESHOLD 16
#define MUL_TOOM33_THRESHOLD 53
#define MUL_TOOM44_THRESHOLD 142
#define MUL_TOOM6H_THRESHOLD 206
#define MUL_TOOM8H_THRESHOLD 292
#define MUL_TOOM32_TO_TOOM43_THRESHOLD 83
#define MUL_TOOM32_TO_TOOM53_THRESHOLD 102
#define MUL_TOOM42_TO_TOOM53_THRESHOLD 97
#define MUL_TOOM42_TO_TOOM63_THRESHOLD 98
#define MUL_TOOM43_TO_TOOM54_THRESHOLD 82
#define SQR_BASECASE_THRESHOLD 0 /* always (native) */
#define SQR_TOOM2_THRESHOLD 20
#define SQR_TOOM3_THRESHOLD 71
#define SQR_TOOM4_THRESHOLD 202
#define SQR_TOOM6_THRESHOLD 298
#define SQR_TOOM8_THRESHOLD 466
#define MULMID_TOOM42_THRESHOLD 20
#define MULMOD_BNM1_THRESHOLD 11
#define SQRMOD_BNM1_THRESHOLD 14
#define MUL_FFT_MODF_THRESHOLD 316 /* k = 5 */
#define MUL_FFT_TABLE3 \
{ { 316, 5}, { 19, 6}, { 10, 5}, { 21, 6}, \
{ 21, 7}, { 11, 6}, { 23, 7}, { 12, 6}, \
{ 25, 7}, { 21, 8}, { 11, 7}, { 24, 8}, \
{ 13, 7}, { 28, 8}, { 15, 7}, { 31, 8}, \
{ 21, 9}, { 11, 8}, { 27, 9}, { 15, 8}, \
{ 33, 9}, { 19, 8}, { 41, 9}, { 23, 8}, \
{ 47, 9}, { 27,10}, { 15, 9}, { 39,10}, \
{ 23, 9}, { 51,11}, { 15,10}, { 31, 9}, \
{ 67,10}, { 39, 9}, { 83,10}, { 47, 9}, \
{ 99,10}, { 55,11}, { 31,10}, { 87,11}, \
{ 47,10}, { 95, 9}, { 191,10}, { 103,12}, \
{ 31,11}, { 63,10}, { 127, 9}, { 255,10}, \
{ 135, 9}, { 271, 5}, { 4351, 6}, { 2303, 7}, \
{ 1215, 8}, { 639,10}, { 175,11}, { 95,10}, \
{ 191, 9}, { 383,10}, { 207, 9}, { 415,11}, \
{ 111,12}, { 63,11}, { 127,10}, { 255, 9}, \
{ 511,10}, { 271, 9}, { 543,11}, { 143,10}, \
{ 287, 9}, { 575,10}, { 303,11}, { 159,10}, \
{ 319, 9}, { 639,11}, { 175,12}, { 95,11}, \
{ 191,10}, { 383,11}, { 207,10}, { 415, 9}, \
{ 831,13}, { 63,12}, { 127,11}, { 255,10}, \
{ 511,11}, { 271,10}, { 543,11}, { 287,10}, \
{ 575,11}, { 303,12}, { 159,11}, { 319,10}, \
{ 639,11}, { 351,12}, { 191,11}, { 383,10}, \
{ 767,11}, { 415,10}, { 831,12}, { 223,11}, \
{ 447,10}, { 895,11}, { 479,13}, { 127,12}, \
{ 255,11}, { 543,12}, { 287,11}, { 607,12}, \
{ 319,11}, { 639,12}, { 351,13}, { 191,12}, \
{ 383,11}, { 767,12}, { 415,11}, { 831,12}, \
{ 447,11}, { 895,12}, { 479,14}, { 127,13}, \
{ 255,12}, { 543,11}, { 1087,12}, { 607,13}, \
{ 319,12}, { 671,11}, { 1343,10}, { 2687,12}, \
{ 703,13}, { 383,12}, { 767,11}, { 1535,12}, \
{ 831,13}, { 447,12}, { 895,11}, { 1791,12}, \
{ 959,14}, { 255,13}, { 511,12}, { 1087,13}, \
{ 575,12}, { 1151,11}, { 2303,12}, { 1215,11}, \
{ 2431,13}, { 639,12}, { 1343,11}, { 2687,13}, \
{ 703,14}, { 383,13}, { 767,12}, { 1535,13}, \
{ 831,12}, { 1663,13}, { 959,15}, { 255,14}, \
{ 511,13}, { 1087,12}, { 2175,13}, { 1151,12}, \
{ 2303,13}, { 1215,12}, { 2431,14}, { 639,13}, \
{ 1343,12}, { 2687,13}, { 1407,12}, { 2815,13}, \
{ 1471,14}, { 767,13}, { 1535,12}, { 3071,13}, \
{ 1663,14}, { 895,13}, { 1791,12}, { 3583,13}, \
{ 1919,15}, { 511,14}, { 1023,13}, { 2175,14}, \
{ 1151,13}, { 2303,12}, { 4607,13}, { 2431,12}, \
{ 4863,14}, { 1279,13}, { 2687,14}, { 1407,13}, \
{ 2815,15}, { 767,14}, { 1535,13}, { 3071,14}, \
{ 1663,13}, { 3455,12}, { 6911,14}, { 1791,13}, \
{ 3583,14}, { 1919,16}, { 511,15}, { 1023,14}, \
{ 2303,13}, { 4607,14}, { 2431,13}, { 4863,15}, \
{ 1279,14}, { 2943,13}, { 5887,15}, { 1535,14}, \
{ 3455,13}, { 6911,15}, { 1791,14}, { 3839,13}, \
{ 7679,16}, { 1023,15}, { 2047,14}, { 4351,15}, \
{ 2303,14}, { 4863,15}, { 2815,14}, { 5887,16}, \
{ 1535,15}, { 3071,14}, { 6143,15}, { 3327,14}, \
{ 6911,15}, { 3839,14}, { 7679,17}, { 1023,16}, \
{ 2047,15}, { 4863,16}, { 2559,15}, { 5887,14}, \
{ 11775,16}, { 3071,15}, { 6911,16}, { 3583,15}, \
{ 7679,17}, { 2047,16}, { 4095,15}, { 8191,16}, \
{ 4607,15}, { 9983,16}, { 5631,15}, { 11775,17}, \
{ 3071,16}, { 65536,17}, { 131072,18}, { 262144,19}, \
{ 524288,20}, {1048576,21}, {2097152,22}, {4194304,23}, \
{8388608,24} }
#define MUL_FFT_TABLE3_SIZE 253
#define MUL_FFT_THRESHOLD 4224
#define SQR_FFT_MODF_THRESHOLD 300 /* k = 5 */
#define SQR_FFT_TABLE3 \
{ { 300, 5}, { 19, 6}, { 10, 5}, { 21, 6}, \
{ 23, 7}, { 12, 6}, { 25, 7}, { 21, 8}, \
{ 11, 7}, { 25, 8}, { 13, 7}, { 27, 8}, \
{ 15, 7}, { 31, 8}, { 21, 9}, { 11, 8}, \
{ 27, 9}, { 15, 8}, { 35, 9}, { 19, 8}, \
{ 39, 9}, { 23, 8}, { 47, 9}, { 27,10}, \
{ 15, 9}, { 39,10}, { 23, 9}, { 51,11}, \
{ 15,10}, { 31, 9}, { 63,10}, { 39, 9}, \
{ 79,10}, { 47, 9}, { 95,10}, { 55,11}, \
{ 31,10}, { 79,11}, { 47,10}, { 95, 9}, \
{ 191, 8}, { 383,10}, { 103,12}, { 31,11}, \
{ 63,10}, { 127, 9}, { 255, 8}, { 511, 9}, \
{ 271, 8}, { 543,11}, { 79,10}, { 159, 9}, \
{ 319, 8}, { 639,10}, { 175,11}, { 95,10}, \
{ 191, 9}, { 383, 5}, { 6399, 6}, { 3327, 7}, \
{ 1727, 6}, { 3455, 7}, { 1791,11}, { 127,10}, \
{ 255, 9}, { 511,10}, { 271, 9}, { 543,10}, \
{ 287, 9}, { 575,10}, { 303,11}, { 159,10}, \
{ 319, 9}, { 639,11}, { 175,10}, { 351,12}, \
{ 95,11}, { 191,10}, { 383,11}, { 207,10}, \
{ 415, 9}, { 831,13}, { 63,11}, { 255,10}, \
{ 511,11}, { 271,10}, { 543,11}, { 287,10}, \
{ 575,11}, { 303,10}, { 607,12}, { 159,11}, \
{ 319,10}, { 639,11}, { 351,10}, { 703,12}, \
{ 191,11}, { 383,10}, { 767,11}, { 415,10}, \
{ 831,12}, { 223,11}, { 447,10}, { 895,11}, \
{ 479,12}, { 255,11}, { 511,10}, { 1023,11}, \
{ 543,12}, { 287,11}, { 575,10}, { 1151,11}, \
{ 607,12}, { 319,11}, { 639,12}, { 351,11}, \
{ 703,13}, { 191,12}, { 383,11}, { 767,12}, \
{ 415,11}, { 831,12}, { 447,11}, { 895,12}, \
{ 479,13}, { 255,12}, { 511,11}, { 1023,12}, \
{ 543,11}, { 1087,12}, { 575,11}, { 1151,12}, \
{ 607,13}, { 319,12}, { 639,11}, { 1279,12}, \
{ 671,11}, { 1343,12}, { 703,13}, { 383,12}, \
{ 767,11}, { 1535,12}, { 831,11}, { 1663,13}, \
{ 447,12}, { 959,14}, { 255,13}, { 511,12}, \
{ 1087,13}, { 575,12}, { 1151,11}, { 2303,12}, \
{ 1215,11}, { 2431,13}, { 639,12}, { 1343,13}, \
{ 703,14}, { 383,13}, { 767,12}, { 1535,13}, \
{ 831,12}, { 1663,13}, { 895,12}, { 1791,13}, \
{ 959,15}, { 255,14}, { 511,13}, { 1023,12}, \
{ 2047,13}, { 1087,12}, { 2175,13}, { 1151,12}, \
{ 2303,13}, { 1215,12}, { 2431,14}, { 639,13}, \
{ 1343,12}, { 2687,13}, { 1407,12}, { 2815,13}, \
{ 1471,14}, { 767,13}, { 1599,12}, { 3199,13}, \
{ 1663,14}, { 895,13}, { 1791,12}, { 3583,15}, \
{ 511,14}, { 1023,13}, { 2175,14}, { 1151,13}, \
{ 2303,12}, { 4607,13}, { 2431,12}, { 4863,14}, \
{ 1279,13}, { 2687,14}, { 1407,13}, { 2815,15}, \
{ 767,14}, { 1535,13}, { 3199,14}, { 1663,13}, \
{ 3455,14}, { 1791,13}, { 3583,14}, { 1919,16}, \
{ 511,15}, { 1023,14}, { 2303,13}, { 4607,14}, \
{ 2431,13}, { 4863,15}, { 1279,14}, { 2815,13}, \
{ 5631,14}, { 2943,13}, { 5887,15}, { 1535,14}, \
{ 3455,15}, { 1791,14}, { 3583,13}, { 7167,14}, \
{ 3839,13}, { 7679,16}, { 1023,15}, { 2047,14}, \
{ 4223,15}, { 2303,14}, { 4863,15}, { 2815,14}, \
{ 5887,16}, { 1535,15}, { 3071,14}, { 6143,15}, \
{ 3327,14}, { 6911,15}, { 3583,14}, { 7167,15}, \
{ 3839,14}, { 7679,17}, { 1023,16}, { 2047,15}, \
{ 4095,14}, { 8191,15}, { 4863,16}, { 2559,15}, \
{ 5887,14}, { 11775,16}, { 3071,15}, { 6911,16}, \
{ 3583,15}, { 7679,14}, { 15359,17}, { 2047,16}, \
{ 4095,15}, { 8447,16}, { 4607,15}, { 9983,16}, \
{ 5119,15}, { 10239,16}, { 5631,15}, { 11775,17}, \
{ 3071,16}, { 65536,17}, { 131072,18}, { 262144,19}, \
{ 524288,20}, {1048576,21}, {2097152,22}, {4194304,23}, \
{8388608,24} }
#define SQR_FFT_TABLE3_SIZE 273
#define SQR_FFT_THRESHOLD 2752
#define MULLO_BASECASE_THRESHOLD 0 /* always */
#define MULLO_DC_THRESHOLD 43
#define MULLO_MUL_N_THRESHOLD 8397
#define SQRLO_BASECASE_THRESHOLD 6
#define SQRLO_DC_THRESHOLD 54
#define SQRLO_SQR_THRESHOLD 5397
#define DC_DIV_QR_THRESHOLD 39
#define DC_DIVAPPR_Q_THRESHOLD 165
#define DC_BDIV_QR_THRESHOLD 39
#define DC_BDIV_Q_THRESHOLD 76
#define INV_MULMOD_BNM1_THRESHOLD 30
#define INV_NEWTON_THRESHOLD 177
#define INV_APPR_THRESHOLD 155
#define BINV_NEWTON_THRESHOLD 230
#define REDC_1_TO_REDC_2_THRESHOLD 28
#define REDC_2_TO_REDC_N_THRESHOLD 43
#define MU_DIV_QR_THRESHOLD 1142
#define MU_DIVAPPR_Q_THRESHOLD 1142
#define MUPI_DIV_QR_THRESHOLD 66
#define MU_BDIV_QR_THRESHOLD 998
#define MU_BDIV_Q_THRESHOLD 1142
#define POWM_SEC_TABLE 1,16,175,269,839,1420
#define GET_STR_DC_THRESHOLD 12
#define GET_STR_PRECOMPUTE_THRESHOLD 19
#define SET_STR_DC_THRESHOLD 552
#define SET_STR_PRECOMPUTE_THRESHOLD 1038
#define FAC_DSC_THRESHOLD 151
#define FAC_ODD_THRESHOLD 23
#define MATRIX22_STRASSEN_THRESHOLD 17
#define HGCD2_DIV1_METHOD 1 /* 8.11% faster than 3 */
#define HGCD_THRESHOLD 87
#define HGCD_APPR_THRESHOLD 96
#define HGCD_REDUCE_THRESHOLD 2121
#define GCD_DC_THRESHOLD 327
#define GCDEXT_DC_THRESHOLD 241
#define JACOBI_BASE_METHOD 4 /* 21.40% faster than 1 */
/* Tuneup completed successfully, took 431056 seconds */

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dnl x86_64 mpn_bdiv_dbm1.
dnl Copyright 2008, 2011, 2012 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/limb
C AMD K8,K9 2.25
C AMD K10 2.25
C Intel P4 12.5
C Intel core2 4
C Intel NHM 3.75
C Intel SBR 3.6
C Intel atom 20
C VIA nano 4
C TODO
C * Optimise feed-in code.
C INPUT PARAMETERS
define(`qp', `%rdi')
define(`up', `%rsi')
define(`n_param', `%rdx')
define(`bd', `%rcx')
define(`cy', `%r8')
define(`n', `%r9')
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
ASM_START()
TEXT
ALIGN(16)
PROLOGUE(mpn_bdiv_dbm1c)
FUNC_ENTRY(4)
IFDOS(` mov 56(%rsp), %r8 ')
mov (up), %rax
mov n_param, n
mov R32(n_param), R32(%r11)
mul bd
lea (up,n,8), up
lea (qp,n,8), qp
neg n
and $3, R32(%r11)
jz L(lo0)
lea -4(n,%r11), n
cmp $2, R32(%r11)
jc L(lo1)
jz L(lo2)
jmp L(lo3)
ALIGN(16)
L(top): mov (up,n,8), %rax
mul bd
L(lo0): sub %rax, %r8
mov %r8, (qp,n,8)
sbb %rdx, %r8
mov 8(up,n,8), %rax
mul bd
L(lo3): sub %rax, %r8
mov %r8, 8(qp,n,8)
sbb %rdx, %r8
mov 16(up,n,8), %rax
mul bd
L(lo2): sub %rax, %r8
mov %r8, 16(qp,n,8)
sbb %rdx, %r8
mov 24(up,n,8), %rax
mul bd
L(lo1): sub %rax, %r8
mov %r8, 24(qp,n,8)
sbb %rdx, %r8
add $4, n
jnz L(top)
mov %r8, %rax
FUNC_EXIT()
ret
EPILOGUE()

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dnl AMD64 mpn_bdiv_q_1, mpn_pi1_bdiv_q_1 -- Hensel division by 1-limb divisor.
dnl Copyright 2001, 2002, 2004-2006, 2010-2012, 2017 Free Software Foundation,
dnl Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/limb cycles/limb
C norm unorm
C AMD K8,K9 11 11
C AMD K10 11 11
C AMD bull 13.5 14
C AMD pile 14 15
C AMD steam
C AMD excavator
C AMD bobcat 14 14
C AMD jaguar 14.5 15
C Intel P4 33 33
C Intel core2 13.5 13.25
C Intel NHM 14 14
C Intel SBR 8 8.25
C Intel IBR 7.75 7.85
C Intel HWL 8 8
C Intel BWL 8 8
C Intel SKL 8 8
C Intel atom 34 36
C Intel SLM 13.7 13.5
C VIA nano 19.25 19.25 needs re-measuring
C INPUT PARAMETERS
define(`rp', `%rdi')
define(`up', `%rsi')
define(`n', `%rdx')
define(`d', `%rcx')
define(`di', `%r8') C just mpn_pi1_bdiv_q_1
define(`ncnt', `%r9') C just mpn_pi1_bdiv_q_1
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
ASM_START()
TEXT
ALIGN(16)
PROLOGUE(mpn_bdiv_q_1)
FUNC_ENTRY(4)
push %rbx
mov %rcx, %rax
xor R32(%rcx), R32(%rcx) C ncnt count
mov %rdx, %r10
bt $0, R32(%rax)
jnc L(evn) C skip bsf unless divisor is even
L(odd): mov %rax, %rbx
shr R32(%rax)
and $127, R32(%rax) C d/2, 7 bits
LEA( binvert_limb_table, %rdx)
movzbl (%rdx,%rax), R32(%rax) C inv 8 bits
mov %rbx, %r11 C d without twos
lea (%rax,%rax), R32(%rdx) C 2*inv
imul R32(%rax), R32(%rax) C inv*inv
imul R32(%rbx), R32(%rax) C inv*inv*d
sub R32(%rax), R32(%rdx) C inv = 2*inv - inv*inv*d, 16 bits
lea (%rdx,%rdx), R32(%rax) C 2*inv
imul R32(%rdx), R32(%rdx) C inv*inv
imul R32(%rbx), R32(%rdx) C inv*inv*d
sub R32(%rdx), R32(%rax) C inv = 2*inv - inv*inv*d, 32 bits
lea (%rax,%rax), %r8 C 2*inv
imul %rax, %rax C inv*inv
imul %rbx, %rax C inv*inv*d
sub %rax, %r8 C inv = 2*inv - inv*inv*d, 64 bits
jmp L(pi1)
L(evn): bsf %rax, %rcx
shr R8(%rcx), %rax
jmp L(odd)
EPILOGUE()
PROLOGUE(mpn_pi1_bdiv_q_1)
FUNC_ENTRY(4)
IFDOS(` mov 56(%rsp), %r8 ')
IFDOS(` mov 64(%rsp), %r9 ')
push %rbx
mov %rcx, %r11 C d
mov %rdx, %r10 C n
mov %r9, %rcx C ncnt
L(pi1): mov (up), %rax C up[0]
dec %r10
jz L(one)
lea 8(up,%r10,8), up C up end
lea (rp,%r10,8), rp C rp end
neg %r10 C -n
test R32(%rcx), R32(%rcx)
jnz L(unorm) C branch if count != 0
xor R32(%rbx), R32(%rbx)
jmp L(nent)
ALIGN(8)
L(ntop):mul %r11 C carry limb in rdx 0 10
mov -8(up,%r10,8), %rax C
sub %rbx, %rax C apply carry bit
setc R8(%rbx) C
sub %rdx, %rax C apply carry limb 5
adc $0, R32(%rbx) C 6
L(nent):imul %r8, %rax C 6
mov %rax, (rp,%r10,8) C
inc %r10 C
jnz L(ntop)
mov -8(up), %r9 C up high limb
jmp L(com)
L(unorm):
mov (up,%r10,8), %r9 C up[1]
shr R8(%rcx), %rax C
neg R32(%rcx)
shl R8(%rcx), %r9 C
neg R32(%rcx)
or %r9, %rax
xor R32(%rbx), R32(%rbx)
jmp L(uent)
ALIGN(8)
L(utop):mul %r11 C carry limb in rdx 0 10
mov (up,%r10,8), %rax C
shl R8(%rcx), %rax C
neg R32(%rcx)
or %r9, %rax
sub %rbx, %rax C apply carry bit
setc R8(%rbx) C
sub %rdx, %rax C apply carry limb 5
adc $0, R32(%rbx) C 6
L(uent):imul %r8, %rax C 6
mov (up,%r10,8), %r9 C
shr R8(%rcx), %r9 C
neg R32(%rcx)
mov %rax, (rp,%r10,8) C
inc %r10 C
jnz L(utop)
L(com): mul %r11 C carry limb in rdx
sub %rbx, %r9 C apply carry bit
sub %rdx, %r9 C apply carry limb
imul %r8, %r9
mov %r9, (rp)
pop %rbx
FUNC_EXIT()
ret
L(one): shr R8(%rcx), %rax
imul %r8, %rax
mov %rax, (rp)
pop %rbx
FUNC_EXIT()
ret
EPILOGUE()

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dnl AMD64 mpn_add_n, mpn_sub_n optimised for bobcat.
dnl Copyright 2003-2005, 2007, 2008, 2010-2013 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/limb
C AMD K8,K9 1.77
C AMD K10 1.76\1.82
C AMD bd1 1.67\2.12
C AMD bd2 1.62\1.82
C AMD bd3
C AMD bd4 1.55\2.2
C AMD zen
C AMD bt1 2.54
C AMD bt2 2
C Intel P4 11
C Intel PNR 4.76
C Intel NHM 5.27
C Intel SBR 2
C Intel IBR 1.94
C Intel HWL 1.63
C Intel BWL 1.51
C Intel SKL 1.51
C Intel atom 3.56
C Intel SLM 4
C VIA nano
C The loop of this code is the result of running a code generation and
C optimization tool suite written by David Harvey and Torbjorn Granlund.
C INPUT PARAMETERS
define(`rp', `%rdi') C rcx
define(`up', `%rsi') C rdx
define(`vp', `%rdx') C r8
define(`n', `%rcx') C r9
define(`cy', `%r8') C rsp+40 (mpn_add_nc and mpn_sub_nc)
ifdef(`OPERATION_add_n', `
define(ADCSBB, adc)
define(func, mpn_add_n)
define(func_nc, mpn_add_nc)')
ifdef(`OPERATION_sub_n', `
define(ADCSBB, sbb)
define(func, mpn_sub_n)
define(func_nc, mpn_sub_nc)')
MULFUNC_PROLOGUE(mpn_add_n mpn_add_nc mpn_sub_n mpn_sub_nc)
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
ASM_START()
TEXT
ALIGN(16)
PROLOGUE(func)
FUNC_ENTRY(4)
xor %r8, %r8
L(ent): test $1, R8(n)
jnz L(bx1)
L(bx0): test $2, R8(n)
jnz L(b10)
L(b00): shr $2, n
neg %r8
mov $3, R32(%rax)
mov (up), %r10
mov 8(up), %r11
jmp L(lo0)
L(b10): shr $2, n
neg %r8
mov $1, R32(%rax)
mov (up), %r8
mov 8(up), %r9
jrcxz L(cj2)
jmp L(top)
L(bx1): test $2, R8(n)
jnz L(b11)
L(b01): shr $2, n
neg %r8
mov $0, R32(%rax)
mov (up), %r9
jrcxz L(cj1)
mov 8(up), %r10
jmp L(lo1)
ALIGN(8)
L(b11): inc n
shr $2, n
neg %r8
mov $2, R32(%rax)
mov (up), %r11
jmp L(lo3)
ALIGN(4)
L(top): mov 8(up,%rax,8), %r10
ADCSBB -8(vp,%rax,8), %r8
mov %r8, -8(rp,%rax,8)
L(lo1): mov 16(up,%rax,8), %r11
ADCSBB (vp,%rax,8), %r9
lea 4(%rax), %rax
mov %r9, -32(rp,%rax,8)
L(lo0): ADCSBB -24(vp,%rax,8), %r10
mov %r10, -24(rp,%rax,8)
L(lo3): ADCSBB -16(vp,%rax,8), %r11
dec n
mov -8(up,%rax,8), %r8
mov %r11, -16(rp,%rax,8)
L(lo2): mov (up,%rax,8), %r9
jnz L(top)
L(cj2): ADCSBB -8(vp,%rax,8), %r8
mov %r8, -8(rp,%rax,8)
L(cj1): ADCSBB (vp,%rax,8), %r9
mov %r9, (rp,%rax,8)
mov $0, R32(%rax)
adc $0, R32(%rax)
FUNC_EXIT()
ret
EPILOGUE()
ALIGN(16)
PROLOGUE(func_nc)
FUNC_ENTRY(4)
IFDOS(` mov 56(%rsp), %r8 ')
jmp L(ent)
EPILOGUE()

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dnl AMD64 mpn_addmul_1 and mpn_submul_1 optimised for AMD bt1/bt2.
dnl Copyright 2003-2005, 2007, 2008, 2011, 2012, 2018-2019 Free Software
dnl Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/limb
C AMD K8,K9 4.52 old measurement
C AMD K10 4.51 old measurement
C AMD bd1 4.66 old measurement
C AMD bd2 4.57 old measurement
C AMD bd3 ?
C AMD bd4 ?
C AMD zen ?
C AMD bt1 5.04
C AMD bt2 5.07
C Intel P4 16.8 18.6 old measurement
C Intel PNR 5.59 old measurement
C Intel NHM 5.39 old measurement
C Intel SBR 3.93 old measurement
C Intel IBR 3.59 old measurement
C Intel HWL 3.61 old measurement
C Intel BWL 2.76 old measurement
C Intel SKL 2.77 old measurement
C Intel atom 23 old measurement
C Intel SLM 8 old measurement
C Intel GLM ?
C VIA nano 5.63 old measurement
C The ALIGNment here might look completely ad-hoc. They are not.
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
ifdef(`OPERATION_addmul_1',`
define(`ADDSUB', `add')
define(`func', `mpn_addmul_1')
')
ifdef(`OPERATION_submul_1',`
define(`ADDSUB', `sub')
define(`func', `mpn_submul_1')
')
MULFUNC_PROLOGUE(mpn_addmul_1 mpn_submul_1)
C Standard parameters
define(`rp', `%rdi')
define(`up', `%rsi')
define(`n_param', `%rdx')
define(`v0', `%rcx')
C Standard allocations
define(`n', `%rbx')
define(`w0', `%r8')
define(`w1', `%r9')
define(`w2', `%r10')
define(`w3', `%r11')
C DOS64 parameters
IFDOS(` define(`rp', `%rcx') ') dnl
IFDOS(` define(`up', `%rsi') ') dnl
IFDOS(` define(`n_param', `%r8') ') dnl
IFDOS(` define(`v0', `%r9') ') dnl
C DOS64 allocations
IFDOS(` define(`n', `%rbx') ') dnl
IFDOS(` define(`w0', `%r8') ') dnl
IFDOS(` define(`w1', `%rdi') ') dnl
IFDOS(` define(`w2', `%r10') ') dnl
IFDOS(` define(`w3', `%r11') ') dnl
ASM_START()
TEXT
ALIGN(64)
PROLOGUE(func)
IFDOS(` push %rsi ')
IFDOS(` push %rdi ')
IFDOS(` mov %rdx, %rsi ')
push %rbx
mov (up), %rax
lea (rp,n_param,8), rp
lea (up,n_param,8), up
mov n_param, n
test $1, R8(n_param)
jne L(bx1)
L(bx0): mul v0
neg n
mov %rax, w0
mov %rdx, w1
test $2, R8(n)
jne L(L2)
L(b00): add $2, n
jmp L(L0)
ALIGN(16)
L(bx1): mul v0
test $2, R8(n)
je L(b01)
L(b11): mov %rax, w2
mov %rdx, w3
neg n
inc n
jmp L(L3)
ALIGN(16)
L(b01): sub $3, n
jc L(n1)
mov %rax, w2
mov %rdx, w3
neg n
ALIGN(16)
L(top): mov -16(up,n,8), %rax
mul v0
mov %rax, w0
mov %rdx, w1
ADDSUB w2, -24(rp,n,8)
adc w3, w0
adc $0, w1
L(L0): mov -8(up,n,8), %rax
mul v0
mov %rax, w2
mov %rdx, w3
ADDSUB w0, -16(rp,n,8)
adc w1, w2
adc $0, w3
L(L3): mov (up,n,8), %rax
mul v0
mov %rax, w0
mov %rdx, w1
ADDSUB w2, -8(rp,n,8)
adc w3, w0
adc $0, w1
L(L2): mov 8(up,n,8), %rax
mul v0
mov %rax, w2
mov %rdx, w3
ADDSUB w0, (rp,n,8)
adc w1, w2
adc $0, w3
add $4, n
js L(top)
L(end): xor R32(%rax), R32(%rax)
ADDSUB w2, -8(rp)
adc w3, %rax
pop %rbx
IFDOS(` pop %rdi ')
IFDOS(` pop %rsi ')
ret
ALIGN(32)
L(n1): ADDSUB %rax, -8(rp)
mov $0, R32(%rax)
adc %rdx, %rax
pop %rbx
IFDOS(` pop %rdi ')
IFDOS(` pop %rsi ')
ret
EPILOGUE()

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dnl AMD64 mpn_copyd optimised for AMD bobcat.
dnl Copyright 2003, 2005, 2007, 2011, 2012 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/limb
C AMD K8,K9 1
C AMD K10 1-2 (alignment fluctuations)
C AMD bd1 ?
C AMD bobcat 1.5
C Intel P4 2.8
C Intel core2 1
C Intel NHM 1-1.25
C Intel SBR 1
C Intel atom 2.87
C VIA nano 2
C INPUT PARAMETERS
C rp rdi
C up rsi
C n rdx
define(`rp',`%rdi')
define(`up',`%rsi')
define(`n',`%rdx')
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
ASM_START()
TEXT
ALIGN(16)
PROLOGUE(mpn_copyd)
FUNC_ENTRY(3)
sub $4, n
jl L(end)
ALIGN(16)
L(top): mov 24(up,n,8), %r8
mov %r8, 24(rp,n,8)
mov 16(up,n,8), %r8
mov %r8, 16(rp,n,8)
mov 8(up,n,8), %r8
mov %r8, 8(rp,n,8)
mov (up,n,8), %r8
mov %r8, (rp,n,8)
L(ent): sub $4, n
jge L(top)
L(end): cmp $-4, R32(n)
jz L(ret)
mov 24(up,n,8), %r8
mov %r8, 24(rp,n,8)
cmp $-3, R32(n)
jz L(ret)
mov 16(up,n,8), %r8
mov %r8, 16(rp,n,8)
cmp $-2, R32(n)
jz L(ret)
mov 8(up,n,8), %r8
mov %r8, 8(rp,n,8)
L(ret): FUNC_EXIT()
ret
EPILOGUE()

94
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dnl AMD64 mpn_copyi optimised for AMD bobcat.
dnl Copyright 2003, 2005, 2007, 2011, 2012 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/limb
C AMD K8,K9 1
C AMD K10 1-2 (alignment fluctuations)
C AMD bd1 ?
C AMD bobcat 1.5
C Intel P4 2.8
C Intel core2 1
C Intel NHM 1-1.25
C Intel SBR 1
C Intel atom 2.87
C VIA nano 2
C INPUT PARAMETERS
C rp rdi
C up rsi
C n rdx
define(`rp',`%rdi')
define(`up',`%rsi')
define(`n',`%rdx')
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
ASM_START()
TEXT
ALIGN(16)
PROLOGUE(mpn_copyi)
FUNC_ENTRY(3)
lea -32(up,n,8), up
lea -32(rp,n,8), rp
neg n
add $4, n
jg L(end)
ALIGN(16)
L(top): mov (up,n,8), %r8
mov %r8, (rp,n,8)
mov 8(up,n,8), %r8
mov %r8, 8(rp,n,8)
mov 16(up,n,8), %r8
mov %r8, 16(rp,n,8)
mov 24(up,n,8), %r8
mov %r8, 24(rp,n,8)
L(ent): add $4, n
jle L(top)
L(end): cmp $4, R32(n)
jz L(ret)
mov (up,n,8), %r8
mov %r8, (rp,n,8)
cmp $3, R32(n)
jz L(ret)
mov 8(up,n,8), %r8
mov %r8, 8(rp,n,8)
cmp $2, R32(n)
jz L(ret)
mov 16(up,n,8), %r8
mov %r8, 16(rp,n,8)
L(ret): FUNC_EXIT()
ret
EPILOGUE()

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dnl AMD64 mpn_gcd_11 -- 1 x 1 gcd.
dnl Based on the K7 gcd_1.asm, by Kevin Ryde. Rehacked for AMD64 by Torbjorn
dnl Granlund.
dnl Copyright 2000-2002, 2005, 2009, 2011, 2012, 2017 Free Software
dnl Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/bit
C AMD K8,K9 ?
C AMD K10 ?
C AMD bd1 ?
C AMD bd2 ?
C AMD bd3 ?
C AMD bd4 ?
C AMD bt1 5.4
C AMD bt2 ?
C AMD zn1 ?
C AMD zn2 ?
C Intel P4 ?
C Intel CNR ?
C Intel PNR ?
C Intel NHM ?
C Intel WSM ?
C Intel SBR ?
C Intel IBR ?
C Intel HWL ?
C Intel BWL ?
C Intel SKL ?
C Intel atom ?
C Intel SLM ?
C Intel GLM ?
C Intel GLM+ ?
C VIA nano ?
C ctz_table[n] is the number of trailing zeros on n, or MAXSHIFT if n==0.
deflit(MAXSHIFT, 8)
deflit(MASK, eval((m4_lshift(1,MAXSHIFT))-1))
DEF_OBJECT(ctz_table,64)
.byte MAXSHIFT
forloop(i,1,MASK,
` .byte m4_count_trailing_zeros(i)
')
END_OBJECT(ctz_table)
define(`u0', `%rdi')
define(`v0', `%rsi')
define(`cnt', `%rcx')
define(`s0', `%rax')
define(`t0', `%rdx')
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
ASM_START()
TEXT
ALIGN(64)
PROLOGUE(mpn_gcd_11)
FUNC_ENTRY(2)
LEA( ctz_table, %r10)
mov v0, t0
sub u0, t0
jz L(end)
ALIGN(16)
L(top): mov u0, s0
sub v0, u0
cmovc t0, u0 C u = |u - v|
cmovc s0, v0 C v = min(u,v)
and $MASK, R32(t0)
movzbl (%r10,t0), R32(cnt)
jz L(count_better)
L(shr): shr R8(cnt), u0
mov v0, t0
sub u0, t0
jnz L(top)
L(end): mov v0, %rax
C rdx = 0 for the benefit of internal gcd_22 call
FUNC_EXIT()
ret
L(count_better):
bsf u0, cnt
jmp L(shr)
EPILOGUE()

37
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dnl AMD64 mpn_gcd_22.
dnl Copyright 2019 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
dnl ABI_SUPPORT(DOS64) C returns mp_double_limb_t in memory
ABI_SUPPORT(STD64)
MULFUNC_PROLOGUE(mpn_gcd_22)
include_mpn(`x86_64/gcd_22.asm')

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/* AMD Bobcat gmp-mparam.h -- Compiler/machine parameter header file.
Copyright 2019 Free Software Foundation, Inc.
This file is part of the GNU MP Library.
The GNU MP Library is free software; you can redistribute it and/or modify
it under the terms of either:
* the GNU Lesser General Public License as published by the Free
Software Foundation; either version 3 of the License, or (at your
option) any later version.
or
* the GNU General Public License as published by the Free Software
Foundation; either version 2 of the License, or (at your option) any
later version.
or both in parallel, as here.
The GNU MP Library is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
for more details.
You should have received copies of the GNU General Public License and the
GNU Lesser General Public License along with the GNU MP Library. If not,
see https://www.gnu.org/licenses/. */
#define GMP_LIMB_BITS 64
#define GMP_LIMB_BYTES 8
/* Disable use of slow functions. FIXME: We should disable lib inclusion. */
#undef HAVE_NATIVE_mpn_mul_2
#undef HAVE_NATIVE_mpn_addmul_2
/* 1600 MHz AMD Bobcat/Zacate */
/* FFT tuning limit = 110,472,704 */
/* Generated by tuneup.c, 2019-10-12, gcc 8.3 */
#define MOD_1_NORM_THRESHOLD 0 /* always */
#define MOD_1_UNNORM_THRESHOLD 0 /* always */
#define MOD_1N_TO_MOD_1_1_THRESHOLD 7
#define MOD_1U_TO_MOD_1_1_THRESHOLD 3
#define MOD_1_1_TO_MOD_1_2_THRESHOLD 31
#define MOD_1_2_TO_MOD_1_4_THRESHOLD 71
#define PREINV_MOD_1_TO_MOD_1_THRESHOLD 14
#define USE_PREINV_DIVREM_1 1 /* native */
#define DIV_QR_1_NORM_THRESHOLD 1
#define DIV_QR_1_UNNORM_THRESHOLD MP_SIZE_T_MAX /* never */
#define DIV_QR_2_PI2_THRESHOLD MP_SIZE_T_MAX /* never */
#define DIVEXACT_1_THRESHOLD 0 /* always (native) */
#define BMOD_1_TO_MOD_1_THRESHOLD 20
#define DIV_1_VS_MUL_1_PERCENT 270
#define MUL_TOOM22_THRESHOLD 24
#define MUL_TOOM33_THRESHOLD 66
#define MUL_TOOM44_THRESHOLD 190
#define MUL_TOOM6H_THRESHOLD 274
#define MUL_TOOM8H_THRESHOLD 381
#define MUL_TOOM32_TO_TOOM43_THRESHOLD 129
#define MUL_TOOM32_TO_TOOM53_THRESHOLD 138
#define MUL_TOOM42_TO_TOOM53_THRESHOLD 127
#define MUL_TOOM42_TO_TOOM63_THRESHOLD 131
#define MUL_TOOM43_TO_TOOM54_THRESHOLD 100
#define SQR_BASECASE_THRESHOLD 0 /* always (native) */
#define SQR_TOOM2_THRESHOLD 30
#define SQR_TOOM3_THRESHOLD 101
#define SQR_TOOM4_THRESHOLD 278
#define SQR_TOOM6_THRESHOLD 372
#define SQR_TOOM8_THRESHOLD 478
#define MULMID_TOOM42_THRESHOLD 22
#define MULMOD_BNM1_THRESHOLD 11
#define SQRMOD_BNM1_THRESHOLD 13
#define MUL_FFT_MODF_THRESHOLD 444 /* k = 5 */
#define MUL_FFT_TABLE3 \
{ { 444, 5}, { 19, 6}, { 10, 5}, { 21, 6}, \
{ 11, 5}, { 23, 6}, { 21, 7}, { 11, 6}, \
{ 25, 7}, { 13, 6}, { 27, 7}, { 21, 8}, \
{ 11, 7}, { 25, 8}, { 13, 7}, { 28, 8}, \
{ 15, 7}, { 31, 8}, { 17, 7}, { 35, 8}, \
{ 19, 7}, { 39, 8}, { 27, 9}, { 15, 8}, \
{ 35, 9}, { 19, 8}, { 41, 9}, { 23, 8}, \
{ 49, 9}, { 27,10}, { 15, 9}, { 39,10}, \
{ 23, 9}, { 55,11}, { 15,10}, { 31, 9}, \
{ 71,10}, { 39, 9}, { 83, 5}, { 1343, 4}, \
{ 2687, 5}, { 1407, 6}, { 735, 7}, { 415, 8}, \
{ 223,10}, { 79,11}, { 47,10}, { 103,12}, \
{ 31,11}, { 63,10}, { 135,11}, { 79,10}, \
{ 167,11}, { 95,10}, { 191,11}, { 111,12}, \
{ 63,11}, { 127,10}, { 255,11}, { 143,10}, \
{ 287, 9}, { 575,11}, { 159,12}, { 95,11}, \
{ 191,10}, { 383,11}, { 207,10}, { 415,13}, \
{ 63,12}, { 127,11}, { 255,10}, { 511,11}, \
{ 271,10}, { 543,11}, { 287,10}, { 575,12}, \
{ 159,11}, { 319,10}, { 639,11}, { 351,10}, \
{ 703,12}, { 191,11}, { 383,10}, { 767,11}, \
{ 415,12}, { 223,13}, { 127,12}, { 255,11}, \
{ 543,12}, { 287,11}, { 607,12}, { 319,11}, \
{ 671,12}, { 351,11}, { 703,13}, { 191,12}, \
{ 383,11}, { 767,12}, { 415,11}, { 831,12}, \
{ 447,14}, { 127,13}, { 255,12}, { 607,13}, \
{ 319,12}, { 703,13}, { 383,12}, { 831,13}, \
{ 447,12}, { 959,14}, { 255,13}, { 511,12}, \
{ 1023,13}, { 575,12}, { 1151,13}, { 703,14}, \
{ 383,13}, { 831,12}, { 1663,13}, { 959,15}, \
{ 255,14}, { 511,13}, { 1087,12}, { 2175,13}, \
{ 1151,14}, { 639,13}, { 1343,12}, { 2687,13}, \
{ 1407,14}, { 767,13}, { 1599,12}, { 3199,13}, \
{ 1663,14}, { 895,15}, { 511,14}, { 1023,13}, \
{ 2175,14}, { 1151,13}, { 2431,12}, { 4863,14}, \
{ 1279,13}, { 2687,14}, { 1407,15}, { 767,14}, \
{ 1535,13}, { 3199,14}, { 1663,13}, { 3455,16}, \
{ 511,15}, { 1023,14}, { 2175,13}, { 4479,14}, \
{ 2431,13}, { 4863,15}, { 1279,14}, { 2943,13}, \
{ 5887,15}, { 1535,14}, { 3455,13}, { 6911,15}, \
{ 1791,14}, { 3839,16}, { 1023,15}, { 2047,14}, \
{ 4479,15}, { 2303,14}, { 4991,15}, { 2559,14}, \
{ 5247,15}, { 2815,14}, { 5887,16}, { 1535,15}, \
{ 3327,14}, { 16384,15}, { 32768,16}, { 65536,17}, \
{ 131072,18}, { 262144,19}, { 524288,20}, {1048576,21}, \
{2097152,22}, {4194304,23}, {8388608,24} }
#define MUL_FFT_TABLE3_SIZE 183
#define MUL_FFT_THRESHOLD 5760
#define SQR_FFT_MODF_THRESHOLD 380 /* k = 5 */
#define SQR_FFT_TABLE3 \
{ { 380, 5}, { 21, 6}, { 11, 5}, { 23, 6}, \
{ 25, 7}, { 25, 8}, { 13, 7}, { 27, 8}, \
{ 15, 7}, { 31, 8}, { 17, 7}, { 35, 8}, \
{ 19, 7}, { 39, 8}, { 27, 9}, { 15, 8}, \
{ 35, 9}, { 19, 8}, { 41, 9}, { 23, 8}, \
{ 47, 9}, { 27,10}, { 15, 9}, { 31, 8}, \
{ 63, 9}, { 39,10}, { 23, 9}, { 51,11}, \
{ 15,10}, { 31, 9}, { 67,10}, { 39, 9}, \
{ 79,10}, { 47, 9}, { 95,10}, { 55,11}, \
{ 31,10}, { 63, 6}, { 1087, 7}, { 575, 8}, \
{ 303, 9}, { 159,10}, { 103,12}, { 31,11}, \
{ 63,10}, { 127, 9}, { 255,10}, { 135,11}, \
{ 79,10}, { 159, 9}, { 319,11}, { 95,10}, \
{ 191, 9}, { 383,11}, { 111,12}, { 63,11}, \
{ 127,10}, { 255, 9}, { 511,10}, { 271,11}, \
{ 143,10}, { 287, 9}, { 575,10}, { 303,11}, \
{ 159,10}, { 319,12}, { 95,11}, { 191,10}, \
{ 383,11}, { 207,13}, { 63,12}, { 127,11}, \
{ 255,10}, { 511,11}, { 271,10}, { 543,11}, \
{ 287,10}, { 575,11}, { 303,12}, { 159,11}, \
{ 319,10}, { 639,11}, { 335,10}, { 671,11}, \
{ 351,10}, { 703,12}, { 191,11}, { 383,10}, \
{ 767,11}, { 415,12}, { 223,11}, { 447,13}, \
{ 127,12}, { 255,11}, { 543,12}, { 287,11}, \
{ 607,12}, { 319,11}, { 671,12}, { 351,11}, \
{ 703,13}, { 191,12}, { 383,11}, { 767,12}, \
{ 415,11}, { 831,12}, { 479,14}, { 127,13}, \
{ 255,12}, { 607,13}, { 319,12}, { 703,13}, \
{ 383,12}, { 831,13}, { 447,12}, { 895,14}, \
{ 255,13}, { 511,12}, { 1023,13}, { 703,14}, \
{ 383,13}, { 831,12}, { 1663,13}, { 895,15}, \
{ 255,14}, { 511,13}, { 1087,12}, { 2175,13}, \
{ 1151,14}, { 639,13}, { 1343,12}, { 2687,13}, \
{ 1407,14}, { 767,13}, { 1599,12}, { 3199,13}, \
{ 1663,14}, { 895,15}, { 511,14}, { 1023,13}, \
{ 2175,14}, { 1151,13}, { 2431,12}, { 4863,14}, \
{ 1279,13}, { 2687,14}, { 1407,15}, { 767,14}, \
{ 1535,13}, { 3199,14}, { 1663,13}, { 3455,16}, \
{ 511,15}, { 1023,14}, { 2175,13}, { 4351,14}, \
{ 2431,13}, { 4863,15}, { 1279,14}, { 2943,13}, \
{ 5887,15}, { 1535,14}, { 3455,15}, { 1791,14}, \
{ 3839,16}, { 1023,15}, { 2047,14}, { 4479,15}, \
{ 2303,14}, { 4863,15}, { 2559,14}, { 5247,15}, \
{ 2815,14}, { 5887,16}, { 1535,15}, { 3327,14}, \
{ 16384,15}, { 32768,16}, { 65536,17}, { 131072,18}, \
{ 262144,19}, { 524288,20}, {1048576,21}, {2097152,22}, \
{4194304,23}, {8388608,24} }
#define SQR_FFT_TABLE3_SIZE 186
#define SQR_FFT_THRESHOLD 3712
#define MULLO_BASECASE_THRESHOLD 0 /* always */
#define MULLO_DC_THRESHOLD 42
#define MULLO_MUL_N_THRESHOLD 10950
#define SQRLO_BASECASE_THRESHOLD 7
#define SQRLO_DC_THRESHOLD 100
#define SQRLO_SQR_THRESHOLD 7293
#define DC_DIV_QR_THRESHOLD 70
#define DC_DIVAPPR_Q_THRESHOLD 204
#define DC_BDIV_QR_THRESHOLD 59
#define DC_BDIV_Q_THRESHOLD 148
#define INV_MULMOD_BNM1_THRESHOLD 46
#define INV_NEWTON_THRESHOLD 246
#define INV_APPR_THRESHOLD 236
#define BINV_NEWTON_THRESHOLD 252
#define REDC_1_TO_REDC_2_THRESHOLD 67
#define REDC_2_TO_REDC_N_THRESHOLD 0 /* always */
#define MU_DIV_QR_THRESHOLD 1589
#define MU_DIVAPPR_Q_THRESHOLD 1589
#define MUPI_DIV_QR_THRESHOLD 108
#define MU_BDIV_QR_THRESHOLD 1442
#define MU_BDIV_Q_THRESHOLD 1470
#define POWM_SEC_TABLE 1,16,194,960,1603,1811,2499
#define GET_STR_DC_THRESHOLD 20
#define GET_STR_PRECOMPUTE_THRESHOLD 34
#define SET_STR_DC_THRESHOLD 345
#define SET_STR_PRECOMPUTE_THRESHOLD 1787
#define FAC_DSC_THRESHOLD 781
#define FAC_ODD_THRESHOLD 104
#define MATRIX22_STRASSEN_THRESHOLD 17
#define HGCD2_DIV1_METHOD 3 /* 3.20% faster than 5 */
#define HGCD_THRESHOLD 110
#define HGCD_APPR_THRESHOLD 50
#define HGCD_REDUCE_THRESHOLD 2681
#define GCD_DC_THRESHOLD 474
#define GCDEXT_DC_THRESHOLD 293
#define JACOBI_BASE_METHOD 2 /* 9.38% faster than 1 */
/* Tuneup completed successfully, took 358881 seconds */

241
blender-5.2.0/extern/gmp-source/mpn/x86_64/bt1/mul_1.asm vendored Normal file
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dnl AMD64 mpn_mul_1 optimised for AMD bt1/bt2.
dnl Copyright 2003-2005, 2007, 2008, 2011, 2012, 2019 Free Software
dnl Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/limb
C AMD K8,K9 4.53 old measurement
C AMD K10 4.53 old measurement
C AMD bd1 4.56 old measurement
C AMD bd2 4.47 old measurement
C AMD bd3 ?
C AMD bd4 ?
C AMD zen ?
C AMD bt1 5.12
C AMD bt2 5.17
C Intel P4 12.6 old measurement
C Intel PNR 4.53 old measurement
C Intel NHM 4.36 old measurement
C Intel SBR 3.0 old measurement
C Intel IBR 2.55 old measurement
C Intel HWL 2.28 old measurement
C Intel BWL 2.36 old measurement
C Intel SKL 2.39 old measurement
C Intel atom 21.0 old measurement
C Intel SLM 9 old measurement
C Intel GLM ?
C VIA nano ?
C The loop of this code is the result of running a code generation and
C optimisation tool suite written by David Harvey and Torbjorn Granlund.
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
C Standard parameters
define(`rp', `%rdi')
define(`up', `%rsi')
define(`n_param', `%rdx')
define(`v0', `%rcx')
define(`cy', `%r8')
C Standard allocations
define(`n', `%rbx')
define(`w0', `%r8')
define(`w1', `%r9')
define(`w2', `%r10')
define(`w3', `%r11')
C DOS64 parameters
IFDOS(` define(`rp', `%rcx') ') dnl
IFDOS(` define(`up', `%rsi') ') dnl
IFDOS(` define(`n_param', `%r8') ') dnl
IFDOS(` define(`v0', `%r9') ') dnl
IFDOS(` define(`cy', `56(%rsp)')') dnl
C DOS64 allocations
IFDOS(` define(`n', `%rbx') ') dnl
IFDOS(` define(`w0', `%r8') ') dnl
IFDOS(` define(`w1', `%rdi') ') dnl
IFDOS(` define(`w2', `%r10') ') dnl
IFDOS(` define(`w3', `%r11') ') dnl
ALIGN(64)
PROLOGUE(mpn_mul_1)
IFDOS(` push %rsi ')
IFDOS(` push %rdi ')
IFDOS(` mov %rdx, %rsi ')
push %rbx
mov (up), %rax
lea (rp,n_param,8), rp
lea (up,n_param,8), up
mov n_param, n
test $1, R8(n_param)
jne L(bx1)
L(bx0): mul v0
neg n
mov %rax, w0
mov %rdx, w1
test $2, R8(n)
jne L(L2)
L(b00): add $2, n
jmp L(L0)
ALIGN(16)
L(b11): mov %rax, w2
mov %rdx, w3
neg n
inc n
jmp L(L3)
ALIGN(16)
L(bx1): mul v0
test $2, R8(n)
jne L(b11)
L(b01): sub $3, n
jc L(n1)
mov %rax, w2
mov %rdx, w3
neg n
ALIGN(16)
L(top): mov -16(up,n,8), %rax
mul v0
mov %rax, w0
mov %rdx, w1
mov w2, -24(rp,n,8)
add w3, w0
adc $0, w1
L(L0): mov -8(up,n,8), %rax
mul v0
mov %rax, w2
mov %rdx, w3
mov w0, -16(rp,n,8)
add w1, w2
adc $0, w3
L(L3): mov (up,n,8), %rax
mul v0
mov %rax, w0
mov %rdx, w1
mov w2, -8(rp,n,8)
add w3, w0
adc $0, w1
L(L2): mov 8(up,n,8), %rax
mul v0
mov %rax, w2
mov %rdx, w3
mov w0, (rp,n,8)
add w1, w2
adc $0, w3
add $4, n
js L(top)
L(end): mov w2, -8(rp)
mov w3, %rax
pop %rbx
IFDOS(` pop %rdi ')
IFDOS(` pop %rsi ')
ret
ALIGN(32)
L(n1): mov %rax, -8(rp)
mov %rdx, %rax
pop %rbx
IFDOS(` pop %rdi ')
IFDOS(` pop %rsi ')
ret
EPILOGUE()
ASM_START()
TEXT
ALIGN(64)
PROLOGUE(mpn_mul_1c)
IFDOS(` push %rsi ')
IFDOS(` push %rdi ')
IFDOS(` mov %rdx, %rsi ')
mov cy, w2
push %rbx
mov (up), %rax
lea (rp,n_param,8), rp
lea (up,n_param,8), up
mov n_param, n
test $1, R8(n_param)
jne L(cx1)
L(cx0): mul v0
neg n
mov %rax, w0
mov %rdx, w1
add w2, w0
adc $0, w1
test $2, R8(n)
jne L(L2)
L(c00): add $2, n
jmp L(L0)
ALIGN(16)
L(cx1): mul v0
test $2, R8(n)
je L(c01)
L(c11): neg n
inc n
add %rax, w2
mov %rdx, w3
adc $0, w3
jmp L(L3)
L(c01): cmp $1, n
jz L(m1)
neg n
add $3, n
add %rax, w2
mov %rdx, w3
adc $0, w3
jmp L(top)
ALIGN(32)
L(m1): add %rax, w2
mov %rdx, %rax
mov w2, -8(rp)
adc $0, %rax
pop %rbx
IFDOS(` pop %rdi ')
IFDOS(` pop %rsi ')
ret
EPILOGUE()

486
blender-5.2.0/extern/gmp-source/mpn/x86_64/bt1/mul_basecase.asm vendored Normal file
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dnl AMD64 mpn_mul_basecase optimised for AMD bobcat.
dnl Copyright 2003-2005, 2007, 2008, 2011, 2012 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/limb
C AMD K8,K9 4.5
C AMD K10 4.5
C AMD bd1 4.75
C AMD bobcat 5
C Intel P4 17.7
C Intel core2 5.5
C Intel NHM 5.43
C Intel SBR 3.92
C Intel atom 23
C VIA nano 5.63
C This mul_basecase is based on mul_1 and addmul_1, since these both run at the
C multiply insn bandwidth, without any apparent loop branch exit pipeline
C replays experienced on K8. The structure is unusual: it falls into mul_1 in
C the same way for all n, then it splits into 4 different wind-down blocks and
C 4 separate addmul_1 loops.
C
C We have not tried using the same addmul_1 loops with a switch into feed-in
C code, as we do in other basecase implementations. Doing that could save
C substantial code volume, but would also probably add some overhead.
C TODO
C * Tune un < 3 code.
C * Fix slowdown for un=vn=3 (67->71) compared to default code.
C * This is 1263 bytes, compared to 1099 bytes for default code. Consider
C combining addmul loops like that code. Tolerable slowdown?
C * Lots of space could be saved by replacing the "switch" code by gradual
C jumps out from mul_1 winddown code, perhaps with no added overhead.
C * Are the ALIGN(16) really necessary? They add about 25 bytes of padding.
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
C Standard parameters
define(`rp', `%rdi')
define(`up', `%rsi')
define(`un_param', `%rdx')
define(`vp', `%rcx')
define(`vn', `%r8')
C Standard allocations
define(`un', `%rbx')
define(`w0', `%r10')
define(`w1', `%r11')
define(`w2', `%r12')
define(`w3', `%r13')
define(`n', `%rbp')
define(`v0', `%r9')
C Temp macro for allowing control over indexing.
C Define to return $1 for more conservative ptr handling.
define(`X',`$2')
ASM_START()
TEXT
ALIGN(16)
PROLOGUE(mpn_mul_basecase)
FUNC_ENTRY(4)
IFDOS(` mov 56(%rsp), %r8d ')
mov (up), %rax
mov (vp), v0
cmp $2, un_param
ja L(ge3)
jz L(u2)
mul v0 C u0 x v0
mov %rax, (rp)
mov %rdx, 8(rp)
FUNC_EXIT()
ret
L(u2): mul v0 C u0 x v0
mov %rax, (rp)
mov 8(up), %rax
mov %rdx, w0
mul v0
add %rax, w0
mov %rdx, w1
adc $0, w1
cmp $1, R32(vn)
jnz L(u2v2)
mov w0, 8(rp)
mov w1, 16(rp)
FUNC_EXIT()
ret
L(u2v2):mov 8(vp), v0
mov (up), %rax
mul v0
add %rax, w0
mov w0, 8(rp)
mov %rdx, %r8 C CAUTION: r8 realloc
adc $0, %r8
mov 8(up), %rax
mul v0
add w1, %r8
adc $0, %rdx
add %r8, %rax
adc $0, %rdx
mov %rax, 16(rp)
mov %rdx, 24(rp)
FUNC_EXIT()
ret
L(ge3): push %rbx
push %rbp
push %r12
push %r13
lea 8(vp), vp
lea -24(rp,un_param,8), rp
lea -24(up,un_param,8), up
xor R32(un), R32(un)
mov $2, R32(n)
sub un_param, un
sub un_param, n
mul v0
mov %rax, w2
mov %rdx, w3
jmp L(L3)
ALIGN(16)
L(top): mov w0, -16(rp,n,8)
add w1, w2
adc $0, w3
mov (up,n,8), %rax
mul v0
mov %rax, w0
mov %rdx, w1
mov w2, -8(rp,n,8)
add w3, w0
adc $0, w1
mov 8(up,n,8), %rax
mul v0
mov %rax, w2
mov %rdx, w3
mov w0, (rp,n,8)
add w1, w2
adc $0, w3
L(L3): mov 16(up,n,8), %rax
mul v0
mov %rax, w0
mov %rdx, w1
mov w2, 8(rp,n,8)
add w3, w0
adc $0, w1
mov 24(up,n,8), %rax
mul v0
mov %rax, w2
mov %rdx, w3
add $4, n
js L(top)
mov w0, -16(rp,n,8)
add w1, w2
adc $0, w3
C Switch on n into right addmul_l loop
test n, n
jz L(r2)
cmp $2, R32(n)
ja L(r3)
jz L(r0)
jmp L(r1)
L(r3): mov w2, X(-8(rp,n,8),16(rp))
mov w3, X((rp,n,8),24(rp))
add $2, un
C outer loop(3)
L(to3): dec vn
jz L(ret)
mov (vp), v0
mov 8(up,un,8), %rax
lea 8(vp), vp
lea 8(rp), rp
mov un, n
mul v0
mov %rax, w2
mov %rdx, w3
jmp L(al3)
ALIGN(16)
L(ta3): add w0, -16(rp,n,8)
adc w1, w2
adc $0, w3
mov (up,n,8), %rax
mul v0
mov %rax, w0
mov %rdx, w1
add w2, -8(rp,n,8)
adc w3, w0
adc $0, w1
mov 8(up,n,8), %rax
mul v0
mov %rax, w2
mov %rdx, w3
add w0, (rp,n,8)
adc w1, w2
adc $0, w3
L(al3): mov 16(up,n,8), %rax
mul v0
mov %rax, w0
mov %rdx, w1
add w2, 8(rp,n,8)
adc w3, w0
adc $0, w1
mov 24(up,n,8), %rax
mul v0
mov %rax, w2
mov %rdx, w3
add $4, n
js L(ta3)
add w0, X(-16(rp,n,8),8(rp))
adc w1, w2
adc $0, w3
add w2, X(-8(rp,n,8),16(rp))
adc $0, w3
mov w3, X((rp,n,8),24(rp))
jmp L(to3)
L(r2): mov X(0(up,n,8),(up)), %rax
mul v0
mov %rax, w0
mov %rdx, w1
mov w2, X(-8(rp,n,8),-8(rp))
add w3, w0
adc $0, w1
mov X(8(up,n,8),8(up)), %rax
mul v0
mov %rax, w2
mov %rdx, w3
mov w0, X((rp,n,8),(rp))
add w1, w2
adc $0, w3
mov X(16(up,n,8),16(up)), %rax
mul v0
mov %rax, w0
mov %rdx, w1
mov w2, X(8(rp,n,8),8(rp))
add w3, w0
adc $0, w1
mov w0, X(16(rp,n,8),16(rp))
adc $0, w3
mov w1, X(24(rp,n,8),24(rp))
inc un
C outer loop(2)
L(to2): dec vn
jz L(ret)
mov (vp), v0
mov 16(up,un,8), %rax
lea 8(vp), vp
lea 8(rp), rp
mov un, n
mul v0
mov %rax, w0
mov %rdx, w1
jmp L(al2)
ALIGN(16)
L(ta2): add w0, -16(rp,n,8)
adc w1, w2
adc $0, w3
mov (up,n,8), %rax
mul v0
mov %rax, w0
mov %rdx, w1
add w2, -8(rp,n,8)
adc w3, w0
adc $0, w1
mov 8(up,n,8), %rax
mul v0
mov %rax, w2
mov %rdx, w3
add w0, (rp,n,8)
adc w1, w2
adc $0, w3
mov 16(up,n,8), %rax
mul v0
mov %rax, w0
mov %rdx, w1
add w2, 8(rp,n,8)
adc w3, w0
adc $0, w1
L(al2): mov 24(up,n,8), %rax
mul v0
mov %rax, w2
mov %rdx, w3
add $4, n
js L(ta2)
add w0, X(-16(rp,n,8),8(rp))
adc w1, w2
adc $0, w3
add w2, X(-8(rp,n,8),16(rp))
adc $0, w3
mov w3, X((rp,n,8),24(rp))
jmp L(to2)
L(r1): mov X(0(up,n,8),8(up)), %rax
mul v0
mov %rax, w0
mov %rdx, w1
mov w2, X(-8(rp,n,8),(rp))
add w3, w0
adc $0, w1
mov X(8(up,n,8),16(up)), %rax
mul v0
mov %rax, w2
mov %rdx, w3
mov w0, X((rp,n,8),8(rp))
add w1, w2
adc $0, w3
mov w2, X(8(rp,n,8),16(rp))
mov w3, X(16(rp,n,8),24(rp))
add $4, un
C outer loop(1)
L(to1): dec vn
jz L(ret)
mov (vp), v0
mov -8(up,un,8), %rax
lea 8(vp), vp
lea 8(rp), rp
mov un, n
mul v0
mov %rax, w2
mov %rdx, w3
jmp L(al1)
ALIGN(16)
L(ta1): add w0, -16(rp,n,8)
adc w1, w2
adc $0, w3
L(al1): mov (up,n,8), %rax
mul v0
mov %rax, w0
mov %rdx, w1
add w2, -8(rp,n,8)
adc w3, w0
adc $0, w1
mov 8(up,n,8), %rax
mul v0
mov %rax, w2
mov %rdx, w3
add w0, (rp,n,8)
adc w1, w2
adc $0, w3
mov 16(up,n,8), %rax
mul v0
mov %rax, w0
mov %rdx, w1
add w2, 8(rp,n,8)
adc w3, w0
adc $0, w1
mov 24(up,n,8), %rax
mul v0
mov %rax, w2
mov %rdx, w3
add $4, n
js L(ta1)
add w0, X(-16(rp,n,8),8(rp))
adc w1, w2
adc $0, w3
add w2, X(-8(rp,n,8),16(rp))
adc $0, w3
mov w3, X((rp,n,8),24(rp))
jmp L(to1)
L(r0): mov X((up,n,8),16(up)), %rax
mul v0
mov %rax, w0
mov %rdx, w1
mov w2, X(-8(rp,n,8),8(rp))
add w3, w0
adc $0, w1
mov w0, X((rp,n,8),16(rp))
mov w1, X(8(rp,n,8),24(rp))
add $3, un
C outer loop(0)
L(to0): dec vn
jz L(ret)
mov (vp), v0
mov (up,un,8), %rax
lea 8(vp), vp
lea 8(rp), rp
mov un, n
mul v0
mov %rax, w0
mov %rdx, w1
jmp L(al0)
ALIGN(16)
L(ta0): add w0, -16(rp,n,8)
adc w1, w2
adc $0, w3
mov (up,n,8), %rax
mul v0
mov %rax, w0
mov %rdx, w1
add w2, -8(rp,n,8)
adc w3, w0
adc $0, w1
L(al0): mov 8(up,n,8), %rax
mul v0
mov %rax, w2
mov %rdx, w3
add w0, (rp,n,8)
adc w1, w2
adc $0, w3
mov 16(up,n,8), %rax
mul v0
mov %rax, w0
mov %rdx, w1
add w2, 8(rp,n,8)
adc w3, w0
adc $0, w1
mov 24(up,n,8), %rax
mul v0
mov %rax, w2
mov %rdx, w3
add $4, n
js L(ta0)
add w0, X(-16(rp,n,8),8(rp))
adc w1, w2
adc $0, w3
add w2, X(-8(rp,n,8),16(rp))
adc $0, w3
mov w3, X((rp,n,8),24(rp))
jmp L(to0)
L(ret): pop %r13
pop %r12
pop %rbp
pop %rbx
FUNC_EXIT()
ret
EPILOGUE()

507
blender-5.2.0/extern/gmp-source/mpn/x86_64/bt1/redc_1.asm vendored Normal file
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dnl X86-64 mpn_redc_1 optimised for AMD bobcat.
dnl Contributed to the GNU project by Torbjörn Granlund.
dnl Copyright 2003-2005, 2007, 2008, 2011-2013 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/limb
C AMD K8,K9 ?
C AMD K10 ?
C AMD bull ?
C AMD pile ?
C AMD steam ?
C AMD bobcat 5.0
C AMD jaguar ?
C Intel P4 ?
C Intel core ?
C Intel NHM ?
C Intel SBR ?
C Intel IBR ?
C Intel HWL ?
C Intel BWL ?
C Intel atom ?
C VIA nano ?
C TODO
C * Micro-optimise, none performed thus far.
C * Consider inlining mpn_add_n.
C * Single basecases out before the pushes.
C When playing with pointers, set this to $2 to fall back to conservative
C indexing in wind-down code.
define(`I',`$1')
define(`rp', `%rdi') C rcx
define(`up', `%rsi') C rdx
define(`mp_param', `%rdx') C r8
define(`n', `%rcx') C r9
define(`u0inv', `%r8') C stack
define(`i', `%r14')
define(`j', `%r15')
define(`mp', `%r12')
define(`q0', `%r13')
define(`w0', `%rbp')
define(`w1', `%r9')
define(`w2', `%r10')
define(`w3', `%r11')
C rax rbx rcx rdx rdi rsi rbp r8 r9 r10 r11 r12 r13 r14 r15
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
define(`ALIGNx', `ALIGN(16)')
ASM_START()
TEXT
ALIGN(32)
PROLOGUE(mpn_redc_1)
FUNC_ENTRY(4)
IFDOS(` mov 56(%rsp), %r8 ')
push %rbx
push %rbp
push %r12
push %r13
push %r14
push %r15
mov (up), q0
mov n, j C outer loop induction var
lea (mp_param,n,8), mp
lea (up,n,8), up
neg n
imul u0inv, q0 C first iteration q0
test $1, R8(n)
jz L(bx0)
L(bx1): test $2, R8(n)
jz L(b3)
L(b1): cmp $-1, R32(n)
jz L(n1)
L(otp1):lea 1(n), i
mov (mp,n,8), %rax
mul q0
mov %rax, w2
mov %rdx, w3
mov 8(mp,n,8), %rax
mul q0
mov %rax, %rbx
mov %rdx, w1
add (up,n,8), w2
adc w3, %rbx
adc $0, w1
mov 16(mp,n,8), %rax
mul q0
mov %rax, w2
mov %rdx, w3
add 8(up,n,8), %rbx
mov %rbx, 8(up,n,8)
adc w1, w2
adc $0, w3
imul u0inv, %rbx C next q limb
jmp L(e1)
ALIGNx
L(tp1): add w0, -16(up,i,8)
adc w1, w2
adc $0, w3
mov (mp,i,8), %rax
mul q0
mov %rax, w0
mov %rdx, w1
add w2, -8(up,i,8)
adc w3, w0
adc $0, w1
mov 8(mp,i,8), %rax
mul q0
mov %rax, w2
mov %rdx, w3
add w0, (up,i,8)
adc w1, w2
adc $0, w3
L(e1): mov 16(mp,i,8), %rax
mul q0
mov %rax, w0
mov %rdx, w1
add w2, 8(up,i,8)
adc w3, w0
adc $0, w1
mov 24(mp,i,8), %rax
mul q0
mov %rax, w2
mov %rdx, w3
add $4, i
js L(tp1)
L(ed1): add w0, I(-16(up),-16(up,i,8))
adc w1, w2
adc $0, w3
add w2, I(-8(up),-8(up,i,8))
adc $0, w3
mov w3, (up,n,8) C up[0]
mov %rbx, q0 C previously computed q limb -> q0
lea 8(up), up C up++
dec j
jnz L(otp1)
jmp L(cj)
L(b3): cmp $-3, R32(n)
jz L(n3)
L(otp3):lea 3(n), i
mov (mp,n,8), %rax
mul q0
mov %rax, w2
mov %rdx, w3
mov 8(mp,n,8), %rax
mul q0
mov %rax, %rbx
mov %rdx, w1
add (up,n,8), w2
adc w3, %rbx
adc $0, w1
mov 16(mp,n,8), %rax
mul q0
mov %rax, w2
mov %rdx, w3
add 8(up,n,8), %rbx
mov %rbx, 8(up,n,8)
adc w1, w2
adc $0, w3
imul u0inv, %rbx C next q limb
jmp L(e3)
ALIGNx
L(tp3): add w0, -16(up,i,8)
adc w1, w2
adc $0, w3
L(e3): mov (mp,i,8), %rax
mul q0
mov %rax, w0
mov %rdx, w1
add w2, -8(up,i,8)
adc w3, w0
adc $0, w1
mov 8(mp,i,8), %rax
mul q0
mov %rax, w2
mov %rdx, w3
add w0, (up,i,8)
adc w1, w2
adc $0, w3
mov 16(mp,i,8), %rax
mul q0
mov %rax, w0
mov %rdx, w1
add w2, 8(up,i,8)
adc w3, w0
adc $0, w1
mov 24(mp,i,8), %rax
mul q0
mov %rax, w2
mov %rdx, w3
add $4, i
js L(tp3)
L(ed3): add w0, I(-16(up),-16(up,i,8))
adc w1, w2
adc $0, w3
add w2, I(-8(up),-8(up,i,8))
adc $0, w3
mov w3, (up,n,8) C up[0]
mov %rbx, q0 C previously computed q limb -> q0
lea 8(up), up C up++
dec j
jnz L(otp3)
C jmp L(cj)
L(cj):
IFSTD(` lea (up,n,8), up C param 2: up
lea (up,n,8), %rdx C param 3: up - n
neg R32(n) ') C param 4: n
IFDOS(` lea (up,n,8), %rdx C param 2: up
lea (%rdx,n,8), %r8 C param 3: up - n
neg R32(n)
mov n, %r9 C param 4: n
mov rp, %rcx ') C param 1: rp
IFSTD(` sub $8, %rsp ')
IFDOS(` sub $40, %rsp ')
ASSERT(nz, `test $15, %rsp')
CALL( mpn_add_n)
IFSTD(` add $8, %rsp ')
IFDOS(` add $40, %rsp ')
L(ret): pop %r15
pop %r14
pop %r13
pop %r12
pop %rbp
pop %rbx
FUNC_EXIT()
ret
L(bx0): test $2, R8(n)
jnz L(b2)
L(b0):
L(otp0):lea (n), i
mov (mp,n,8), %rax
mul q0
mov %rax, w0
mov %rdx, w1
mov 8(mp,n,8), %rax
mul q0
mov %rax, %rbx
mov %rdx, w3
add (up,n,8), w0
adc w1, %rbx
adc $0, w3
mov 16(mp,n,8), %rax
mul q0
mov %rax, w0
mov %rdx, w1
add 8(up,n,8), %rbx
mov %rbx, 8(up,n,8)
adc w3, w0
adc $0, w1
imul u0inv, %rbx C next q limb
jmp L(e0)
ALIGNx
L(tp0): add w0, -16(up,i,8)
adc w1, w2
adc $0, w3
mov (mp,i,8), %rax
mul q0
mov %rax, w0
mov %rdx, w1
add w2, -8(up,i,8)
adc w3, w0
adc $0, w1
mov 8(mp,i,8), %rax
mul q0
mov %rax, w2
mov %rdx, w3
add w0, (up,i,8)
adc w1, w2
adc $0, w3
mov 16(mp,i,8), %rax
mul q0
mov %rax, w0
mov %rdx, w1
add w2, 8(up,i,8)
adc w3, w0
adc $0, w1
L(e0): mov 24(mp,i,8), %rax
mul q0
mov %rax, w2
mov %rdx, w3
add $4, i
js L(tp0)
L(ed0): add w0, I(-16(up),-16(up,i,8))
adc w1, w2
adc $0, w3
add w2, I(-8(up),-8(up,i,8))
adc $0, w3
mov w3, (up,n,8) C up[0]
mov %rbx, q0 C previously computed q limb -> q0
lea 8(up), up C up++
dec j
jnz L(otp0)
jmp L(cj)
L(b2): cmp $-2, R32(n)
jz L(n2)
L(otp2):lea 2(n), i
mov (mp,n,8), %rax
mul q0
mov %rax, w0
mov %rdx, w1
mov 8(mp,n,8), %rax
mul q0
mov %rax, %rbx
mov %rdx, w3
add (up,n,8), w0
adc w1, %rbx
adc $0, w3
mov 16(mp,n,8), %rax
mul q0
mov %rax, w0
mov %rdx, w1
add 8(up,n,8), %rbx
mov %rbx, 8(up,n,8)
adc w3, w0
adc $0, w1
imul u0inv, %rbx C next q limb
jmp L(e2)
ALIGNx
L(tp2): add w0, -16(up,i,8)
adc w1, w2
adc $0, w3
mov (mp,i,8), %rax
mul q0
mov %rax, w0
mov %rdx, w1
add w2, -8(up,i,8)
adc w3, w0
adc $0, w1
L(e2): mov 8(mp,i,8), %rax
mul q0
mov %rax, w2
mov %rdx, w3
add w0, (up,i,8)
adc w1, w2
adc $0, w3
mov 16(mp,i,8), %rax
mul q0
mov %rax, w0
mov %rdx, w1
add w2, 8(up,i,8)
adc w3, w0
adc $0, w1
mov 24(mp,i,8), %rax
mul q0
mov %rax, w2
mov %rdx, w3
add $4, i
js L(tp2)
L(ed2): add w0, I(-16(up),-16(up,i,8))
adc w1, w2
adc $0, w3
add w2, I(-8(up),-8(up,i,8))
adc $0, w3
mov w3, (up,n,8) C up[0]
mov %rbx, q0 C previously computed q limb -> q0
lea 8(up), up C up++
dec j
jnz L(otp2)
jmp L(cj)
L(n1): mov (mp_param), %rax
mul q0
add -8(up), %rax
adc (up), %rdx
mov %rdx, (rp)
mov $0, R32(%rax)
adc R32(%rax), R32(%rax)
jmp L(ret)
L(n2): mov (mp_param), %rax
mov -16(up), %rbp
mul q0
add %rax, %rbp
mov %rdx, %r9
adc $0, %r9
mov -8(mp), %rax
mov -8(up), %r10
mul q0
add %rax, %r10
mov %rdx, %r11
adc $0, %r11
add %r9, %r10
adc $0, %r11
mov %r10, q0
imul u0inv, q0 C next q0
mov -16(mp), %rax
mul q0
add %rax, %r10
mov %rdx, %r9
adc $0, %r9
mov -8(mp), %rax
mov (up), %r14
mul q0
add %rax, %r14
adc $0, %rdx
add %r9, %r14
adc $0, %rdx
xor R32(%rax), R32(%rax)
add %r11, %r14
adc 8(up), %rdx
mov %r14, (rp)
mov %rdx, 8(rp)
adc R32(%rax), R32(%rax)
jmp L(ret)
ALIGNx
L(n3): mov -24(mp), %rax
mov -24(up), %r10
mul q0
add %rax, %r10
mov -16(mp), %rax
mov %rdx, %r11
adc $0, %r11
mov -16(up), %rbp
mul q0
add %rax, %rbp
mov %rdx, %r9
adc $0, %r9
mov -8(mp), %rax
add %r11, %rbp
mov -8(up), %r10
adc $0, %r9
mul q0
mov %rbp, q0
imul u0inv, q0 C next q0
add %rax, %r10
mov %rdx, %r11
adc $0, %r11
mov %rbp, -16(up)
add %r9, %r10
adc $0, %r11
mov %r10, -8(up)
mov %r11, -24(up) C up[0]
lea 8(up), up C up++
dec j
jnz L(n3)
mov -48(up), %rdx
mov -40(up), %rbx
xor R32(%rax), R32(%rax)
add %rbp, %rdx
adc %r10, %rbx
adc -8(up), %r11
mov %rdx, (rp)
mov %rbx, 8(rp)
mov %r11, 16(rp)
adc R32(%rax), R32(%rax)
jmp L(ret)
EPILOGUE()
ASM_END()

565
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@@ -0,0 +1,565 @@
dnl AMD64 mpn_sqr_basecase optimised for AMD bobcat.
dnl Copyright 2003-2005, 2007, 2008, 2011, 2012 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/limb
C AMD K8,K9 4.5
C AMD K10 4.5
C AMD bd1 4.75
C AMD bobcat 5
C Intel P4 17.7
C Intel core2 5.5
C Intel NHM 5.43
C Intel SBR 3.92
C Intel atom 23
C VIA nano 5.63
C This sqr_basecase is based on mul_1 and addmul_1, since these both run at the
C multiply insn bandwidth, without any apparent loop branch exit pipeline
C replays experienced on K8. The structure is unusual: it falls into mul_1 in
C the same way for all n, then it splits into 4 different wind-down blocks and
C 4 separate addmul_1 loops.
C
C We have not tried using the same addmul_1 loops with a switch into feed-in
C code, as we do in other basecase implementations. Doing that could save
C substantial code volume, but would also probably add some overhead.
C TODO
C * Tune un < 4 code.
C * Perhaps implement a larger final corner (it is now 2 x 1).
C * Lots of space could be saved by replacing the "switch" code by gradual
C jumps out from mul_1 winddown code, perhaps with no added overhead.
C * Are the ALIGN(16) really necessary? They add about 25 bytes of padding.
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
C Standard parameters
define(`rp', `%rdi')
define(`up', `%rsi')
define(`un_param', `%rdx')
C Standard allocations
define(`un', `%rbx')
define(`w0', `%r8')
define(`w1', `%r9')
define(`w2', `%r10')
define(`w3', `%r11')
define(`n', `%rbp')
define(`v0', `%rcx')
C Temp macro for allowing control over indexing.
C Define to return $1 for more conservative ptr handling.
define(`X',`$2')
dnl define(`X',`$1')
ASM_START()
TEXT
ALIGN(64)
PROLOGUE(mpn_sqr_basecase)
FUNC_ENTRY(3)
mov (up), %rax
cmp $2, R32(un_param)
jae L(ge2)
mul %rax
mov %rax, (rp)
mov %rdx, 8(rp)
FUNC_EXIT()
ret
L(ge2): mov (up), v0
jnz L(g2)
mul %rax
mov %rax, (rp)
mov 8(up), %rax
mov %rdx, w0
mul v0
add %rax, w0
mov %rdx, w1
adc $0, w1
mov 8(up), v0
mov (up), %rax
mul v0
add %rax, w0
mov w0, 8(rp)
mov %rdx, w0 C CAUTION: r8 realloc
adc $0, w0
mov 8(up), %rax
mul v0
add w1, w0
adc $0, %rdx
add w0, %rax
adc $0, %rdx
mov %rax, 16(rp)
mov %rdx, 24(rp)
FUNC_EXIT()
ret
L(g2): cmp $3, R32(un_param)
ja L(g3)
mul %rax
mov %rax, (rp)
mov %rdx, 8(rp)
mov 8(up), %rax
mul %rax
mov %rax, 16(rp)
mov %rdx, 24(rp)
mov 16(up), %rax
mul %rax
mov %rax, 32(rp)
mov %rdx, 40(rp)
mov (up), v0
mov 8(up), %rax
mul v0
mov %rax, w0
mov %rdx, w1
mov 16(up), %rax
mul v0
xor R32(w2), R32(w2)
add %rax, w1
adc %rdx, w2
mov 8(up), v0
mov 16(up), %rax
mul v0
xor R32(w3), R32(w3)
add %rax, w2
adc %rdx, w3
add w0, w0
adc w1, w1
adc w2, w2
adc w3, w3
mov $0, R32(v0)
adc v0, v0
add w0, 8(rp)
adc w1, 16(rp)
adc w2, 24(rp)
adc w3, 32(rp)
adc v0, 40(rp)
FUNC_EXIT()
ret
L(g3): push %rbx
push %rbp
mov 8(up), %rax
lea -24(rp,un_param,8), rp
lea -24(up,un_param,8), up
neg un_param
push un_param C for sqr_diag_addlsh1
lea (un_param), un
lea 3(un_param), n
mul v0
mov %rax, w2
mov %rdx, w3
jmp L(L3)
ALIGN(16)
L(top): mov w0, -16(rp,n,8)
add w1, w2
adc $0, w3
mov (up,n,8), %rax
mul v0
mov %rax, w0
mov %rdx, w1
mov w2, -8(rp,n,8)
add w3, w0
adc $0, w1
mov 8(up,n,8), %rax
mul v0
mov %rax, w2
mov %rdx, w3
mov w0, (rp,n,8)
add w1, w2
adc $0, w3
L(L3): mov 16(up,n,8), %rax
mul v0
mov %rax, w0
mov %rdx, w1
mov w2, 8(rp,n,8)
add w3, w0
adc $0, w1
mov 24(up,n,8), %rax
mul v0
mov %rax, w2
mov %rdx, w3
add $4, n
js L(top)
mov w0, -16(rp,n,8)
add w1, w2
adc $0, w3
test n, n
jz L(r2)
cmp $2, R32(n)
ja L(r3)
jz L(r0)
L(r1): mov X((up,n,8),8(up)), %rax
mul v0
mov %rax, w0
mov %rdx, w1
mov w2, X(-8(rp,n,8),(rp))
add w3, w0
adc $0, w1
mov X(8(up,n,8),16(up)), %rax
mul v0
mov %rax, w2
mov %rdx, w3
mov w0, X((rp,n,8),8(rp))
add w1, w2
adc $0, w3
mov w2, X(8(rp,n,8),16(rp))
mov w3, X(16(rp,n,8),24(rp))
add $5, un
jmp L(to0)
L(r2): mov X((up,n,8),(up)), %rax
mul v0
mov %rax, w0
mov %rdx, w1
mov w2, X(-8(rp,n,8),-8(rp))
add w3, w0
adc $0, w1
mov X(8(up,n,8),8(up)), %rax
mul v0
mov %rax, w2
mov %rdx, w3
mov w0, X((rp,n,8),(rp))
add w1, w2
adc $0, w3
mov X(16(up,n,8),16(up)), %rax
mul v0
mov %rax, w0
mov %rdx, w1
mov w2, X(8(rp,n,8),8(rp))
add w3, w0
adc $0, w1
mov w0, X(16(rp,n,8),16(rp))
adc $0, w3
mov w1, X(24(rp,n,8),24(rp))
add $6, un
jmp L(to1)
L(r3): mov w2, X(-8(rp,n,8),16(rp))
mov w3, X((rp,n,8),24(rp))
add $3, un
jmp L(to2)
L(r0): mov X((up,n,8),16(up)), %rax
mul v0
mov %rax, w0
mov %rdx, w1
mov w2, X(-8(rp,n,8),8(rp))
add w3, w0
adc $0, w1
mov w0, X((rp,n,8),16(rp))
mov w1, X(8(rp,n,8),24(rp))
add $4, un
C jmp L(to3)
C fall through into main loop
L(outer):
mov un, n
mov (up,un,8), v0
mov 8(up,un,8), %rax
lea 8(rp), rp
mul v0
mov %rax, w2
mov %rdx, w3
jmp L(al3)
ALIGN(16)
L(ta3): add w0, -16(rp,n,8)
adc w1, w2
adc $0, w3
mov (up,n,8), %rax
mul v0
mov %rax, w0
mov %rdx, w1
add w2, -8(rp,n,8)
adc w3, w0
adc $0, w1
mov 8(up,n,8), %rax
mul v0
mov %rax, w2
mov %rdx, w3
add w0, (rp,n,8)
adc w1, w2
adc $0, w3
L(al3): mov 16(up,n,8), %rax
mul v0
mov %rax, w0
mov %rdx, w1
add w2, 8(rp,n,8)
adc w3, w0
adc $0, w1
mov 24(up,n,8), %rax
mul v0
mov %rax, w2
mov %rdx, w3
add $4, n
js L(ta3)
add w0, X(-16(rp,n,8),8(rp))
adc w1, w2
adc $0, w3
add w2, X(-8(rp,n,8),16(rp))
adc $0, w3
mov w3, X((rp,n,8),24(rp))
L(to2): mov un, n
cmp $-4, R32(un)
jnc L(end)
add $4, un
mov 8(up,n,8), v0
mov 16(up,n,8), %rax
lea 8(rp), rp
mul v0
mov %rax, w0
mov %rdx, w1
jmp L(al2)
ALIGN(16)
L(ta2): add w0, -16(rp,n,8)
adc w1, w2
adc $0, w3
mov (up,n,8), %rax
mul v0
mov %rax, w0
mov %rdx, w1
add w2, -8(rp,n,8)
adc w3, w0
adc $0, w1
mov 8(up,n,8), %rax
mul v0
mov %rax, w2
mov %rdx, w3
add w0, (rp,n,8)
adc w1, w2
adc $0, w3
mov 16(up,n,8), %rax
mul v0
mov %rax, w0
mov %rdx, w1
add w2, 8(rp,n,8)
adc w3, w0
adc $0, w1
L(al2): mov 24(up,n,8), %rax
mul v0
mov %rax, w2
mov %rdx, w3
add $4, n
js L(ta2)
add w0, X(-16(rp,n,8),8(rp))
adc w1, w2
adc $0, w3
add w2, X(-8(rp,n,8),16(rp))
adc $0, w3
mov w3, X((rp,n,8),24(rp))
L(to1): mov un, n
mov -16(up,un,8), v0
mov -8(up,un,8), %rax
lea 8(rp), rp
mul v0
mov %rax, w2
mov %rdx, w3
jmp L(al1)
ALIGN(16)
L(ta1): add w0, -16(rp,n,8)
adc w1, w2
adc $0, w3
L(al1): mov (up,n,8), %rax
mul v0
mov %rax, w0
mov %rdx, w1
add w2, -8(rp,n,8)
adc w3, w0
adc $0, w1
mov 8(up,n,8), %rax
mul v0
mov %rax, w2
mov %rdx, w3
add w0, (rp,n,8)
adc w1, w2
adc $0, w3
mov 16(up,n,8), %rax
mul v0
mov %rax, w0
mov %rdx, w1
add w2, 8(rp,n,8)
adc w3, w0
adc $0, w1
mov 24(up,n,8), %rax
mul v0
mov %rax, w2
mov %rdx, w3
add $4, n
js L(ta1)
add w0, X(-16(rp,n,8),8(rp))
adc w1, w2
adc $0, w3
add w2, X(-8(rp,n,8),16(rp))
adc $0, w3
mov w3, X((rp,n,8),24(rp))
L(to0): mov un, n
mov -8(up,un,8), v0
mov (up,un,8), %rax
lea 8(rp), rp
mul v0
mov %rax, w0
mov %rdx, w1
jmp L(al0)
ALIGN(16)
L(ta0): add w0, -16(rp,n,8)
adc w1, w2
adc $0, w3
mov (up,n,8), %rax
mul v0
mov %rax, w0
mov %rdx, w1
add w2, -8(rp,n,8)
adc w3, w0
adc $0, w1
L(al0): mov 8(up,n,8), %rax
mul v0
mov %rax, w2
mov %rdx, w3
add w0, (rp,n,8)
adc w1, w2
adc $0, w3
mov 16(up,n,8), %rax
mul v0
mov %rax, w0
mov %rdx, w1
add w2, 8(rp,n,8)
adc w3, w0
adc $0, w1
mov 24(up,n,8), %rax
mul v0
mov %rax, w2
mov %rdx, w3
add $4, n
js L(ta0)
add w0, X(-16(rp,n,8),8(rp))
adc w1, w2
adc $0, w3
add w2, X(-8(rp,n,8),16(rp))
adc $0, w3
mov w3, X((rp,n,8),24(rp))
jmp L(outer)
L(end): mov X(8(up,un,8),(up)), v0
mov X(16(up,un,8),8(up)), %rax
mul v0
mov %rax, w0
mov %rdx, w1
mov X(24(up,un,8),16(up)), %rax
mul v0
mov %rax, w2
mov %rdx, w3
add w0, X(24(rp,un,8),16(rp))
adc w1, w2
adc $0, w3
add w2, X(32(rp,un,8),24(rp))
adc $0, w3
mov X(16(up,un,8),8(up)), v0
mov X(24(up,un,8),16(up)), %rax
mul v0
add %rax, w3
mov w3, X(40(rp,un,8),32(rp))
adc $0, %rdx
mov %rdx, X(48(rp,un,8),40(rp))
C sqr_diag_addlsh1
lea 16(up), up
lea 40(rp), rp
pop n
lea 2(n,n), n
mov (up,n,4), %rax
mul %rax
xor R32(w2), R32(w2)
mov 8(rp,n,8), w0
mov %rax, (rp,n,8)
jmp L(lm)
ALIGN(8)
L(tsd): add %rbx, w0
adc %rax, w1
mov w0, -8(rp,n,8)
mov 8(rp,n,8), w0
mov w1, (rp,n,8)
L(lm): mov 16(rp,n,8), w1
adc w0, w0
adc w1, w1
lea (%rdx,w2), %rbx
mov 8(up,n,4), %rax
setc R8(w2)
mul %rax
add $2, n
js L(tsd)
L(esd): add %rbx, w0
adc %rax, w1
mov w0, X(-8(rp,n,8),-8(rp))
mov w1, X((rp,n,8),(rp))
adc w2, %rdx
mov %rdx, X(8(rp,n,8),8(rp))
pop %rbp
pop %rbx
FUNC_EXIT()
ret
EPILOGUE()

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dnl X86-64 mpn_com.
dnl Copyright 2017 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
MULFUNC_PROLOGUE(mpn_com)
include_mpn(`x86_64/fastsse/com.asm')

37
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dnl X86-64 mpn_copyd.
dnl Copyright 2017 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
MULFUNC_PROLOGUE(mpn_copyd)
include_mpn(`x86_64/fastsse/copyd.asm')

37
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dnl X86-64 mpn_copyi.
dnl Copyright 2017 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
MULFUNC_PROLOGUE(mpn_copyi)
include_mpn(`x86_64/fastsse/copyi.asm')

37
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dnl AMD64 mpn_gcd_11.
dnl Copyright 2012 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
MULFUNC_PROLOGUE(mpn_gcd_11)
include_mpn(`x86_64/bd2/gcd_11.asm')

37
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dnl AMD64 mpn_gcd_22.
dnl Copyright 2019 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
dnl ABI_SUPPORT(DOS64) C returns mp_double_limb_t in memory
ABI_SUPPORT(STD64)
MULFUNC_PROLOGUE(mpn_gcd_22)
include_mpn(`x86_64/bd2/gcd_22.asm')

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/* AMD Jaguar gmp-mparam.h -- Compiler/machine parameter header file.
Copyright 2019 Free Software Foundation, Inc.
This file is part of the GNU MP Library.
The GNU MP Library is free software; you can redistribute it and/or modify
it under the terms of either:
* the GNU Lesser General Public License as published by the Free
Software Foundation; either version 3 of the License, or (at your
option) any later version.
or
* the GNU General Public License as published by the Free Software
Foundation; either version 2 of the License, or (at your option) any
later version.
or both in parallel, as here.
The GNU MP Library is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
for more details.
You should have received copies of the GNU General Public License and the
GNU Lesser General Public License along with the GNU MP Library. If not,
see https://www.gnu.org/licenses/. */
#define GMP_LIMB_BITS 64
#define GMP_LIMB_BYTES 8
/* Disable use of slow functions. FIXME: We should disable lib inclusion. */
#undef HAVE_NATIVE_mpn_mul_2
#undef HAVE_NATIVE_mpn_addmul_2
/* 2050 MHz AMD Jaguar/Kabini */
/* FFT tuning limit = 225,381,546 */
/* Generated by tuneup.c, 2019-10-18, gcc 8.3 */
#define MOD_1_NORM_THRESHOLD 3
#define MOD_1_UNNORM_THRESHOLD 4
#define MOD_1N_TO_MOD_1_1_THRESHOLD 4
#define MOD_1U_TO_MOD_1_1_THRESHOLD 4
#define MOD_1_1_TO_MOD_1_2_THRESHOLD 65
#define MOD_1_2_TO_MOD_1_4_THRESHOLD 0 /* never mpn_mod_1s_2p */
#define PREINV_MOD_1_TO_MOD_1_THRESHOLD 10
#define USE_PREINV_DIVREM_1 1 /* native */
#define DIV_QR_1_NORM_THRESHOLD 4
#define DIV_QR_1_UNNORM_THRESHOLD MP_SIZE_T_MAX /* never */
#define DIV_QR_2_PI2_THRESHOLD MP_SIZE_T_MAX /* never */
#define DIVEXACT_1_THRESHOLD 0 /* always (native) */
#define BMOD_1_TO_MOD_1_THRESHOLD 15
#define DIV_1_VS_MUL_1_PERCENT 267
#define MUL_TOOM22_THRESHOLD 25
#define MUL_TOOM33_THRESHOLD 32
#define MUL_TOOM44_THRESHOLD 93
#define MUL_TOOM6H_THRESHOLD 366
#define MUL_TOOM8H_THRESHOLD 537
#define MUL_TOOM32_TO_TOOM43_THRESHOLD 63
#define MUL_TOOM32_TO_TOOM53_THRESHOLD 172
#define MUL_TOOM42_TO_TOOM53_THRESHOLD 63
#define MUL_TOOM42_TO_TOOM63_THRESHOLD 67
#define MUL_TOOM43_TO_TOOM54_THRESHOLD 91
#define SQR_BASECASE_THRESHOLD 0 /* always (native) */
#define SQR_TOOM2_THRESHOLD 20
#define SQR_TOOM3_THRESHOLD 97
#define SQR_TOOM4_THRESHOLD 220
#define SQR_TOOM6_THRESHOLD 318
#define SQR_TOOM8_THRESHOLD 434
#define MULMID_TOOM42_THRESHOLD 20
#define MULMOD_BNM1_THRESHOLD 11
#define SQRMOD_BNM1_THRESHOLD 13
#define MUL_FFT_MODF_THRESHOLD 348 /* k = 5 */
#define MUL_FFT_TABLE3 \
{ { 348, 5}, { 17, 6}, { 9, 5}, { 19, 6}, \
{ 23, 7}, { 21, 8}, { 11, 7}, { 24, 8}, \
{ 13, 7}, { 28, 8}, { 15, 7}, { 31, 8}, \
{ 17, 7}, { 35, 8}, { 19, 7}, { 39, 8}, \
{ 21, 9}, { 11, 8}, { 29, 9}, { 15, 8}, \
{ 35, 9}, { 19, 8}, { 41, 9}, { 23, 8}, \
{ 49, 9}, { 27,10}, { 15, 9}, { 39,10}, \
{ 23, 9}, { 55,11}, { 15,10}, { 31, 9}, \
{ 67,10}, { 39, 9}, { 79,10}, { 55,11}, \
{ 31,10}, { 63, 6}, { 1087, 8}, { 303, 9}, \
{ 159,10}, { 95,12}, { 31,11}, { 63,10}, \
{ 127, 9}, { 255,11}, { 79,10}, { 159, 9}, \
{ 319,10}, { 167,11}, { 95,10}, { 191, 9}, \
{ 383,10}, { 207, 9}, { 415,11}, { 111,12}, \
{ 63,11}, { 127,10}, { 255, 9}, { 511,10}, \
{ 271,11}, { 143,10}, { 287, 9}, { 575,10}, \
{ 303,11}, { 159,10}, { 319,12}, { 95,11}, \
{ 191,10}, { 383,11}, { 207,10}, { 415,11}, \
{ 223,13}, { 63,12}, { 127,11}, { 255,10}, \
{ 511,11}, { 271,10}, { 543,11}, { 287,10}, \
{ 575,11}, { 303,12}, { 159,11}, { 319,10}, \
{ 639,11}, { 351,12}, { 191,11}, { 415,12}, \
{ 223,11}, { 479,13}, { 127,12}, { 255,11}, \
{ 543,12}, { 287,11}, { 607,12}, { 319,11}, \
{ 639,12}, { 351,13}, { 191,12}, { 383,11}, \
{ 767,12}, { 415,11}, { 831,12}, { 479,14}, \
{ 127,13}, { 255,12}, { 543,11}, { 1087,12}, \
{ 607,13}, { 319,12}, { 703,13}, { 383,12}, \
{ 831,13}, { 447,12}, { 895,14}, { 255,13}, \
{ 511,12}, { 1023,13}, { 575,12}, { 1151,13}, \
{ 639,12}, { 1279,13}, { 703,14}, { 383,13}, \
{ 831,12}, { 1663,13}, { 895,15}, { 255,14}, \
{ 511,13}, { 1087,12}, { 2175,13}, { 1151,14}, \
{ 639,13}, { 1343,12}, { 2687,14}, { 767,13}, \
{ 1663,14}, { 895,15}, { 511,14}, { 1023,13}, \
{ 2175,14}, { 1151,13}, { 2431,14}, { 1279,13}, \
{ 2687,15}, { 767,14}, { 1663,13}, { 3327,16}, \
{ 511,15}, { 1023,14}, { 2175,13}, { 4351,14}, \
{ 2431,13}, { 4863,15}, { 1279,14}, { 2943,13}, \
{ 5887,15}, { 1535,14}, { 3455,13}, { 6911,15}, \
{ 1791,14}, { 3839,13}, { 7679,16}, { 1023,15}, \
{ 2047,14}, { 4223,13}, { 8447,14}, { 4479,15}, \
{ 2303,14}, { 4863,15}, { 2559,14}, { 5247,15}, \
{ 2815,14}, { 5887,16}, { 1535,15}, { 3071,14}, \
{ 6271,15}, { 3327,14}, { 6911,15}, { 3839,14}, \
{ 7679,17}, { 1023,16}, { 2047,15}, { 4095,14}, \
{ 8447,15}, { 4351,14}, { 8959,15}, { 4863,16}, \
{ 2559,15}, { 5887,14}, { 11775,16}, { 3071,15}, \
{ 32768,16}, { 65536,17}, { 131072,18}, { 262144,19}, \
{ 524288,20}, {1048576,21}, {2097152,22}, {4194304,23}, \
{8388608,24} }
#define MUL_FFT_TABLE3_SIZE 201
#define MUL_FFT_THRESHOLD 3200
#define SQR_FFT_MODF_THRESHOLD 340 /* k = 5 */
#define SQR_FFT_TABLE3 \
{ { 340, 5}, { 19, 6}, { 10, 5}, { 21, 6}, \
{ 11, 5}, { 23, 6}, { 21, 7}, { 11, 6}, \
{ 23, 7}, { 12, 6}, { 25, 7}, { 13, 6}, \
{ 27, 7}, { 21, 8}, { 11, 7}, { 25, 8}, \
{ 13, 7}, { 27, 8}, { 15, 7}, { 31, 8}, \
{ 21, 9}, { 11, 8}, { 27, 9}, { 15, 8}, \
{ 35, 9}, { 19, 8}, { 41, 9}, { 23, 8}, \
{ 47, 9}, { 27,10}, { 15, 9}, { 39,10}, \
{ 23, 9}, { 51,11}, { 15,10}, { 31, 9}, \
{ 63,10}, { 39, 9}, { 79,10}, { 47,11}, \
{ 31,10}, { 79,11}, { 47,10}, { 95, 6}, \
{ 1663, 7}, { 895, 9}, { 239, 8}, { 479,10}, \
{ 127, 9}, { 255, 8}, { 511,10}, { 135, 9}, \
{ 271,11}, { 79, 9}, { 319,11}, { 95,10}, \
{ 191, 9}, { 383,10}, { 207,11}, { 111,12}, \
{ 63,11}, { 127,10}, { 255, 9}, { 511,10}, \
{ 271, 9}, { 543,10}, { 287, 9}, { 575,10}, \
{ 303, 9}, { 607,10}, { 319, 9}, { 639,12}, \
{ 95,11}, { 191,10}, { 383,11}, { 207,10}, \
{ 415,13}, { 63,12}, { 127,11}, { 255,10}, \
{ 511,11}, { 271,10}, { 543,11}, { 287,10}, \
{ 575,11}, { 303,10}, { 607,11}, { 319,10}, \
{ 639,11}, { 351,10}, { 703,11}, { 367,12}, \
{ 191,11}, { 383,10}, { 767,11}, { 415,12}, \
{ 223,11}, { 479,13}, { 127,12}, { 255,11}, \
{ 543,12}, { 287,11}, { 607,12}, { 319,11}, \
{ 639,12}, { 351,11}, { 703,13}, { 191,12}, \
{ 383,11}, { 767,12}, { 415,11}, { 831,12}, \
{ 479,14}, { 127,13}, { 255,12}, { 607,13}, \
{ 319,12}, { 735,13}, { 383,12}, { 831,13}, \
{ 447,12}, { 895,14}, { 255,13}, { 511,12}, \
{ 1023,13}, { 575,12}, { 1151,13}, { 703,14}, \
{ 383,13}, { 831,12}, { 1663,13}, { 895,15}, \
{ 255,14}, { 511,13}, { 1087,12}, { 2175,13}, \
{ 1151,14}, { 639,13}, { 1343,12}, { 2687,13}, \
{ 1407,14}, { 767,13}, { 1599,12}, { 3199,13}, \
{ 1663,14}, { 895,15}, { 511,14}, { 1023,13}, \
{ 2175,14}, { 1151,13}, { 2431,14}, { 1279,13}, \
{ 2687,14}, { 1407,15}, { 767,14}, { 1535,13}, \
{ 3199,14}, { 1663,13}, { 3455,16}, { 511,15}, \
{ 1023,14}, { 2175,13}, { 4479,14}, { 2431,13}, \
{ 4863,15}, { 1279,14}, { 2943,13}, { 5887,15}, \
{ 1535,14}, { 3455,13}, { 6911,15}, { 1791,14}, \
{ 3839,13}, { 7679,16}, { 1023,15}, { 2047,14}, \
{ 4479,15}, { 2303,14}, { 4991,15}, { 2815,14}, \
{ 5887,16}, { 1535,15}, { 3071,14}, { 6143,15}, \
{ 3327,14}, { 6911,15}, { 3839,14}, { 7679,17}, \
{ 1023,16}, { 2047,15}, { 4095,14}, { 8191,15}, \
{ 4351,14}, { 8959,15}, { 4863,16}, { 2559,15}, \
{ 5887,14}, { 11775,16}, { 3071,15}, { 32768,16}, \
{ 65536,17}, { 131072,18}, { 262144,19}, { 524288,20}, \
{1048576,21}, {2097152,22}, {4194304,23}, {8388608,24} }
#define SQR_FFT_TABLE3_SIZE 208
#define SQR_FFT_THRESHOLD 2880
#define MULLO_BASECASE_THRESHOLD 0 /* always */
#define MULLO_DC_THRESHOLD 63
#define MULLO_MUL_N_THRESHOLD 6253
#define SQRLO_BASECASE_THRESHOLD 8
#define SQRLO_DC_THRESHOLD 54
#define SQRLO_SQR_THRESHOLD 5558
#define DC_DIV_QR_THRESHOLD 72
#define DC_DIVAPPR_Q_THRESHOLD 195
#define DC_BDIV_QR_THRESHOLD 50
#define DC_BDIV_Q_THRESHOLD 90
#define INV_MULMOD_BNM1_THRESHOLD 46
#define INV_NEWTON_THRESHOLD 195
#define INV_APPR_THRESHOLD 197
#define BINV_NEWTON_THRESHOLD 230
#define REDC_1_TO_REDC_2_THRESHOLD 67
#define REDC_2_TO_REDC_N_THRESHOLD 0 /* always */
#define MU_DIV_QR_THRESHOLD 1334
#define MU_DIVAPPR_Q_THRESHOLD 1334
#define MUPI_DIV_QR_THRESHOLD 104
#define MU_BDIV_QR_THRESHOLD 1017
#define MU_BDIV_Q_THRESHOLD 1187
#define POWM_SEC_TABLE 1,16,194,712,779,2387
#define GET_STR_DC_THRESHOLD 15
#define GET_STR_PRECOMPUTE_THRESHOLD 29
#define SET_STR_DC_THRESHOLD 216
#define SET_STR_PRECOMPUTE_THRESHOLD 994
#define FAC_DSC_THRESHOLD 153
#define FAC_ODD_THRESHOLD 0 /* always */
#define MATRIX22_STRASSEN_THRESHOLD 17
#define HGCD2_DIV1_METHOD 1 /* 9.38% faster than 3 */
#define HGCD_THRESHOLD 77
#define HGCD_APPR_THRESHOLD 50
#define HGCD_REDUCE_THRESHOLD 2121
#define GCD_DC_THRESHOLD 440
#define GCDEXT_DC_THRESHOLD 273
#define JACOBI_BASE_METHOD 1 /* 7.74% faster than 4 */
/* Tuneup completed successfully, took 495910 seconds */

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dnl AMD64 mpn_cnd_add_n, mpn_cnd_sub_n
dnl Copyright 2011-2013 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/limb
C AMD K8,K9 2
C AMD K10 2
C AMD bd1 2.32
C AMD bobcat 3
C Intel P4 13
C Intel core2 2.9
C Intel NHM 2.8
C Intel SBR 2.4
C Intel atom 5.33
C VIA nano 3
C NOTES
C * It might seem natural to use the cmov insn here, but since this function
C is supposed to have the exact same execution pattern for cnd true and
C false, and since cmov's documentation is not clear about whether it
C actually reads both source operands and writes the register for a false
C condition, we cannot use it.
C * Two cases could be optimised: (1) cnd_add_n could use ADCSBB-from-memory
C to save one insn/limb, and (2) when up=rp cnd_add_n and cnd_sub_n could use
C ADCSBB-to-memory, again saving 1 insn/limb.
C * This runs optimally at decoder bandwidth on K10. It has not been tuned
C for any other processor.
C INPUT PARAMETERS
define(`cnd', `%rdi') dnl rcx
define(`rp', `%rsi') dnl rdx
define(`up', `%rdx') dnl r8
define(`vp', `%rcx') dnl r9
define(`n', `%r8') dnl rsp+40
ifdef(`OPERATION_cnd_add_n', `
define(ADDSUB, add)
define(ADCSBB, adc)
define(func, mpn_cnd_add_n)')
ifdef(`OPERATION_cnd_sub_n', `
define(ADDSUB, sub)
define(ADCSBB, sbb)
define(func, mpn_cnd_sub_n)')
MULFUNC_PROLOGUE(mpn_cnd_add_n mpn_cnd_sub_n)
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
ASM_START()
TEXT
ALIGN(16)
PROLOGUE(func)
FUNC_ENTRY(4)
IFDOS(` mov 56(%rsp), R32(%r8)')
push %rbx
push %rbp
push %r12
push %r13
push %r14
neg cnd
sbb cnd, cnd C make cnd mask
lea (vp,n,8), vp
lea (up,n,8), up
lea (rp,n,8), rp
mov R32(n), R32(%rax)
neg n
and $3, R32(%rax)
jz L(top) C carry-save reg rax = 0 in this arc
cmp $2, R32(%rax)
jc L(b1)
jz L(b2)
L(b3): mov (vp,n,8), %r12
mov 8(vp,n,8), %r13
mov 16(vp,n,8), %r14
and cnd, %r12
mov (up,n,8), %r10
and cnd, %r13
mov 8(up,n,8), %rbx
and cnd, %r14
mov 16(up,n,8), %rbp
ADDSUB %r12, %r10
mov %r10, (rp,n,8)
ADCSBB %r13, %rbx
mov %rbx, 8(rp,n,8)
ADCSBB %r14, %rbp
mov %rbp, 16(rp,n,8)
sbb R32(%rax), R32(%rax) C save carry
add $3, n
js L(top)
jmp L(end)
L(b2): mov (vp,n,8), %r12
mov 8(vp,n,8), %r13
mov (up,n,8), %r10
and cnd, %r12
mov 8(up,n,8), %rbx
and cnd, %r13
ADDSUB %r12, %r10
mov %r10, (rp,n,8)
ADCSBB %r13, %rbx
mov %rbx, 8(rp,n,8)
sbb R32(%rax), R32(%rax) C save carry
add $2, n
js L(top)
jmp L(end)
L(b1): mov (vp,n,8), %r12
mov (up,n,8), %r10
and cnd, %r12
ADDSUB %r12, %r10
mov %r10, (rp,n,8)
sbb R32(%rax), R32(%rax) C save carry
add $1, n
jns L(end)
ALIGN(16)
L(top): mov (vp,n,8), %r12
mov 8(vp,n,8), %r13
mov 16(vp,n,8), %r14
mov 24(vp,n,8), %r11
and cnd, %r12
mov (up,n,8), %r10
and cnd, %r13
mov 8(up,n,8), %rbx
and cnd, %r14
mov 16(up,n,8), %rbp
and cnd, %r11
mov 24(up,n,8), %r9
add R32(%rax), R32(%rax) C restore carry
ADCSBB %r12, %r10
mov %r10, (rp,n,8)
ADCSBB %r13, %rbx
mov %rbx, 8(rp,n,8)
ADCSBB %r14, %rbp
mov %rbp, 16(rp,n,8)
ADCSBB %r11, %r9
mov %r9, 24(rp,n,8)
sbb R32(%rax), R32(%rax) C save carry
add $4, n
js L(top)
L(end): neg R32(%rax)
pop %r14
pop %r13
pop %r12
pop %rbp
pop %rbx
FUNC_EXIT()
ret
EPILOGUE()

95
blender-5.2.0/extern/gmp-source/mpn/x86_64/com.asm vendored Normal file
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dnl AMD64 mpn_com.
dnl Copyright 2004-2006, 2011, 2012 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/limb
C AMD K8,K9 1.25
C AMD K10 1.25
C Intel P4 2.78
C Intel core2 1.1
C Intel corei 1.5
C Intel atom ?
C VIA nano 2
C INPUT PARAMETERS
define(`rp',`%rdi')
define(`up',`%rsi')
define(`n',`%rdx')
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
ASM_START()
TEXT
ALIGN(32)
PROLOGUE(mpn_com)
FUNC_ENTRY(3)
movq (up), %r8
movl R32(%rdx), R32(%rax)
leaq (up,n,8), up
leaq (rp,n,8), rp
negq n
andl $3, R32(%rax)
je L(b00)
cmpl $2, R32(%rax)
jc L(b01)
je L(b10)
L(b11): notq %r8
movq %r8, (rp,n,8)
decq n
jmp L(e11)
L(b10): addq $-2, n
jmp L(e10)
.byte 0x90,0x90,0x90,0x90,0x90,0x90
L(b01): notq %r8
movq %r8, (rp,n,8)
incq n
jz L(ret)
L(oop): movq (up,n,8), %r8
L(b00): movq 8(up,n,8), %r9
notq %r8
notq %r9
movq %r8, (rp,n,8)
movq %r9, 8(rp,n,8)
L(e11): movq 16(up,n,8), %r8
L(e10): movq 24(up,n,8), %r9
notq %r8
notq %r9
movq %r8, 16(rp,n,8)
movq %r9, 24(rp,n,8)
addq $4, n
jnc L(oop)
L(ret): FUNC_EXIT()
ret
EPILOGUE()

93
blender-5.2.0/extern/gmp-source/mpn/x86_64/copyd.asm vendored Normal file
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dnl AMD64 mpn_copyd -- copy limb vector, decrementing.
dnl Copyright 2003, 2005, 2007, 2011, 2012 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/limb
C AMD K8,K9 1
C AMD K10 1
C AMD bd1 1.36
C AMD bobcat 1.71
C Intel P4 2-3
C Intel core2 1
C Intel NHM 1
C Intel SBR 1
C Intel atom 2
C VIA nano 2
IFSTD(`define(`rp',`%rdi')')
IFSTD(`define(`up',`%rsi')')
IFSTD(`define(`n', `%rdx')')
IFDOS(`define(`rp',`%rcx')')
IFDOS(`define(`up',`%rdx')')
IFDOS(`define(`n', `%r8')')
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
ASM_START()
TEXT
ALIGN(64)
PROLOGUE(mpn_copyd)
lea -8(up,n,8), up
lea (rp,n,8), rp
sub $4, n
jc L(end)
nop
L(top): mov (up), %rax
mov -8(up), %r9
lea -32(rp), rp
mov -16(up), %r10
mov -24(up), %r11
lea -32(up), up
mov %rax, 24(rp)
mov %r9, 16(rp)
sub $4, n
mov %r10, 8(rp)
mov %r11, (rp)
jnc L(top)
L(end): shr R32(n)
jnc 1f
mov (up), %rax
mov %rax, -8(rp)
lea -8(rp), rp
lea -8(up), up
1: shr R32(n)
jnc 1f
mov (up), %rax
mov -8(up), %r9
mov %rax, -8(rp)
mov %r9, -16(rp)
1: ret
EPILOGUE()

92
blender-5.2.0/extern/gmp-source/mpn/x86_64/copyi.asm vendored Normal file
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dnl AMD64 mpn_copyi -- copy limb vector, incrementing.
dnl Copyright 2003, 2005, 2007, 2011, 2012 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/limb
C AMD K8,K9 1
C AMD K10 1
C AMD bd1 1.36
C AMD bobcat 1.71
C Intel P4 2-3
C Intel core2 1
C Intel NHM 1
C Intel SBR 1
C Intel atom 2
C VIA nano 2
IFSTD(`define(`rp',`%rdi')')
IFSTD(`define(`up',`%rsi')')
IFSTD(`define(`n', `%rdx')')
IFDOS(`define(`rp',`%rcx')')
IFDOS(`define(`up',`%rdx')')
IFDOS(`define(`n', `%r8')')
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
ASM_START()
TEXT
ALIGN(64)
.byte 0,0,0,0,0,0
PROLOGUE(mpn_copyi)
lea -8(rp), rp
sub $4, n
jc L(end)
L(top): mov (up), %rax
mov 8(up), %r9
lea 32(rp), rp
mov 16(up), %r10
mov 24(up), %r11
lea 32(up), up
mov %rax, -24(rp)
mov %r9, -16(rp)
sub $4, n
mov %r10, -8(rp)
mov %r11, (rp)
jnc L(top)
L(end): shr R32(n)
jnc 1f
mov (up), %rax
mov %rax, 8(rp)
lea 8(rp), rp
lea 8(up), up
1: shr R32(n)
jnc 1f
mov (up), %rax
mov 8(up), %r9
mov %rax, 8(rp)
mov %r9, 16(rp)
1: ret
EPILOGUE()

53
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dnl AMD64 mpn_addlsh1_n -- rp[] = up[] + (vp[] << 1)
dnl AMD64 mpn_rsblsh1_n -- rp[] = (vp[] << 1) - up[]
dnl Contributed to the GNU project by Torbjorn Granlund.
dnl Copyright 2008, 2010-2012 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
define(LSH, 1)
define(RSH, 63)
ifdef(`OPERATION_addlsh1_n', `
define(ADDSUB, add)
define(ADCSBB, adc)
define(func, mpn_addlsh1_n)')
ifdef(`OPERATION_rsblsh1_n', `
define(ADDSUB, sub)
define(ADCSBB, sbb)
define(func, mpn_rsblsh1_n)')
MULFUNC_PROLOGUE(mpn_addlsh1_n mpn_rsblsh1_n)
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
include_mpn(`x86_64/aorrlshC_n.asm')

53
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dnl AMD64 mpn_addlsh2_n -- rp[] = up[] + (vp[] << 2)
dnl AMD64 mpn_rsblsh2_n -- rp[] = (vp[] << 2) - up[]
dnl Contributed to the GNU project by Torbjorn Granlund.
dnl Copyright 2008, 2010-2012 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
define(LSH, 2)
define(RSH, 62)
ifdef(`OPERATION_addlsh2_n', `
define(ADDSUB, add)
define(ADCSBB, adc)
define(func, mpn_addlsh2_n)')
ifdef(`OPERATION_rsblsh2_n', `
define(ADDSUB, sub)
define(ADCSBB, sbb)
define(func, mpn_rsblsh2_n)')
MULFUNC_PROLOGUE(mpn_addlsh2_n mpn_rsblsh2_n)
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
include_mpn(`x86_64/aorrlshC_n.asm')

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dnl AMD64 mpn_addlsh_n and mpn_rsblsh_n. R = V2^k +- U.
dnl Copyright 2011, 2012 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
MULFUNC_PROLOGUE(mpn_addlsh_n mpn_addlsh_nc mpn_rsblsh_n)
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
include_mpn(`x86_64/coreinhm/aorrlsh_n.asm')

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dnl Core 2 mpn_add_err1_n, mpn_sub_err1_n
dnl Contributed by David Harvey.
dnl Copyright 2011 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/limb
C AMD K8,K9 ?
C AMD K10 ?
C Intel P4 ?
C Intel core2 4.14
C Intel corei ?
C Intel atom ?
C VIA nano ?
C INPUT PARAMETERS
define(`rp', `%rdi')
define(`up', `%rsi')
define(`vp', `%rdx')
define(`ep', `%rcx')
define(`yp', `%r8')
define(`n', `%r9')
define(`cy_param', `8(%rsp)')
define(`el', `%rbx')
define(`eh', `%rbp')
define(`t0', `%r10')
define(`t1', `%r11')
define(`t2', `%r12')
define(`t3', `%r13')
define(`w0', `%r14')
define(`w1', `%r15')
ifdef(`OPERATION_add_err1_n', `
define(ADCSBB, adc)
define(func, mpn_add_err1_n)')
ifdef(`OPERATION_sub_err1_n', `
define(ADCSBB, sbb)
define(func, mpn_sub_err1_n)')
MULFUNC_PROLOGUE(mpn_add_err1_n mpn_sub_err1_n)
ASM_START()
TEXT
ALIGN(16)
PROLOGUE(func)
mov cy_param, %rax
push %rbx
push %rbp
push %r12
push %r13
push %r14
push %r15
lea (up,n,8), up
lea (vp,n,8), vp
lea (rp,n,8), rp
mov R32(n), R32(%r10)
and $3, R32(%r10)
jz L(0mod4)
cmp $2, R32(%r10)
jc L(1mod4)
jz L(2mod4)
L(3mod4):
xor R32(el), R32(el)
xor R32(eh), R32(eh)
xor R32(t0), R32(t0)
xor R32(t1), R32(t1)
lea -24(yp,n,8), yp
neg n
shr $1, %al C restore carry
mov (up,n,8), w0
mov 8(up,n,8), w1
ADCSBB (vp,n,8), w0
mov w0, (rp,n,8)
cmovc 16(yp), el
ADCSBB 8(vp,n,8), w1
mov w1, 8(rp,n,8)
cmovc 8(yp), t0
mov 16(up,n,8), w0
ADCSBB 16(vp,n,8), w0
mov w0, 16(rp,n,8)
cmovc (yp), t1
setc %al C save carry
add t0, el
adc $0, eh
add t1, el
adc $0, eh
add $3, n
jnz L(loop)
jmp L(end)
ALIGN(16)
L(0mod4):
xor R32(el), R32(el)
xor R32(eh), R32(eh)
lea (yp,n,8), yp
neg n
jmp L(loop)
ALIGN(16)
L(1mod4):
xor R32(el), R32(el)
xor R32(eh), R32(eh)
lea -8(yp,n,8), yp
neg n
shr $1, %al C restore carry
mov (up,n,8), w0
ADCSBB (vp,n,8), w0
mov w0, (rp,n,8)
cmovc (yp), el
setc %al C save carry
add $1, n
jnz L(loop)
jmp L(end)
ALIGN(16)
L(2mod4):
xor R32(el), R32(el)
xor R32(eh), R32(eh)
xor R32(t0), R32(t0)
lea -16(yp,n,8), yp
neg n
shr $1, %al C restore carry
mov (up,n,8), w0
mov 8(up,n,8), w1
ADCSBB (vp,n,8), w0
mov w0, (rp,n,8)
cmovc 8(yp), el
ADCSBB 8(vp,n,8), w1
mov w1, 8(rp,n,8)
cmovc (yp), t0
setc %al C save carry
add t0, el
adc $0, eh
add $2, n
jnz L(loop)
jmp L(end)
ALIGN(32)
L(loop):
mov (up,n,8), w0
shr $1, %al C restore carry
mov -8(yp), t0
mov $0, R32(t3)
ADCSBB (vp,n,8), w0
cmovnc t3, t0
mov w0, (rp,n,8)
mov 8(up,n,8), w1
mov 16(up,n,8), w0
ADCSBB 8(vp,n,8), w1
mov -16(yp), t1
cmovnc t3, t1
mov -24(yp), t2
mov w1, 8(rp,n,8)
ADCSBB 16(vp,n,8), w0
cmovnc t3, t2
mov 24(up,n,8), w1
ADCSBB 24(vp,n,8), w1
cmovc -32(yp), t3
setc %al C save carry
add t0, el
adc $0, eh
add t1, el
adc $0, eh
add t2, el
adc $0, eh
lea -32(yp), yp
mov w0, 16(rp,n,8)
add t3, el
adc $0, eh
add $4, n
mov w1, -8(rp,n,8)
jnz L(loop)
L(end):
mov el, (ep)
mov eh, 8(ep)
pop %r15
pop %r14
pop %r13
pop %r12
pop %rbp
pop %rbx
ret
EPILOGUE()

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dnl Intel mpn_add_n/mpn_sub_n optimised for Conroe, Nehalem.
dnl Copyright 2006, 2007, 2011-2013 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/limb
C AMD K8,K9 2
C AMD K10 1.93\2
C AMD bull 1.62\2.1
C AMD pile 1.6\1.7
C AMD steam
C AMD excavator
C AMD bobcat 2.79
C AMD jaguar 2.54
C Intel P4 10
C Intel core2 2
C Intel NHM 2
C Intel SBR 2
C Intel IBR 1.95
C Intel HWL 1.72
C Intel BWL 1.54
C Intel SKL 1.52
C Intel atom 9
C Intel SLM 6.5
C VIA nano 3
C INPUT PARAMETERS
define(`rp', `%rdi')
define(`up', `%rsi')
define(`vp', `%rdx')
define(`n', `%rcx')
define(`cy', `%r8')
ifdef(`OPERATION_add_n', `
define(ADCSBB, adc)
define(func, mpn_add_n)
define(func_nc, mpn_add_nc)')
ifdef(`OPERATION_sub_n', `
define(ADCSBB, sbb)
define(func, mpn_sub_n)
define(func_nc, mpn_sub_nc)')
MULFUNC_PROLOGUE(mpn_add_n mpn_add_nc mpn_sub_n mpn_sub_nc)
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
ASM_START()
TEXT
ALIGN(16)
PROLOGUE(func)
FUNC_ENTRY(4)
xor %r8, %r8
L(start):
mov (up), %r10
mov (vp), %r11
lea (up,n,8), up
lea (vp,n,8), vp
lea (rp,n,8), rp
mov R32(n), R32(%rax)
neg n
and $3, R32(%rax)
je L(b00)
add %rax, n C clear low rcx bits for jrcxz
cmp $2, R32(%rax)
jl L(b01)
je L(b10)
L(b11): neg %r8 C set cy
jmp L(e11)
L(b00): neg %r8 C set cy
mov %r10, %r8
mov %r11, %r9
lea 4(n), n
jmp L(e00)
nop
nop
nop
L(b01): neg %r8 C set cy
jmp L(top)
L(b10): neg %r8 C set cy
mov %r10, %r8
mov %r11, %r9
jmp L(e10)
L(end): ADCSBB %r11, %r10
mov %r10, -8(rp)
mov R32(%rcx), R32(%rax) C clear eax, ecx contains 0
adc R32(%rax), R32(%rax)
FUNC_EXIT()
ret
ALIGN(16)
L(top): jrcxz L(end)
mov (up,n,8), %r8
mov (vp,n,8), %r9
lea 4(n), n
ADCSBB %r11, %r10
mov %r10, -40(rp,n,8)
L(e00): mov -24(up,n,8), %r10
mov -24(vp,n,8), %r11
ADCSBB %r9, %r8
mov %r8, -32(rp,n,8)
L(e11): mov -16(up,n,8), %r8
mov -16(vp,n,8), %r9
ADCSBB %r11, %r10
mov %r10, -24(rp,n,8)
L(e10): mov -8(up,n,8), %r10
mov -8(vp,n,8), %r11
ADCSBB %r9, %r8
mov %r8, -16(rp,n,8)
jmp L(top)
EPILOGUE()
PROLOGUE(func_nc)
FUNC_ENTRY(4)
IFDOS(` mov 56(%rsp), %r8 ')
jmp L(start)
EPILOGUE()

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dnl x86-64 mpn_addmul_1 and mpn_submul_1, optimized for "Core 2".
dnl Copyright 2003-2005, 2007-2009, 2011, 2012 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/limb
C AMD K8,K9 4.52
C AMD K10 4.01
C AMD bull 4.98
C AMD pile 4.83
C AMD steam
C AMD excavator
C AMD bobcat 5.56
C AMD jaguar 5.54
C Intel P4 16.3 17.3
C Intel core2 4.32 4.61
C Intel NHM 5.08
C Intel SBR 4.04
C Intel IBR 3.95
C Intel HWL 3.66
C Intel BWL 2.87
C Intel SKL 2.79
C Intel atom 20.6
C Intel SLM 7.6
C VIA nano 5.25
C INPUT PARAMETERS
define(`rp', `%rdi')
define(`up', `%rsi')
define(`n', `%rdx')
define(`v0', `%rcx')
ifdef(`OPERATION_addmul_1',`
define(`ADDSUB', `add')
define(`func', `mpn_addmul_1')
define(`func_1c', `mpn_addmul_1c')
')
ifdef(`OPERATION_submul_1',`
define(`ADDSUB', `sub')
define(`func', `mpn_submul_1')
define(`func_1c', `mpn_submul_1c')
')
MULFUNC_PROLOGUE(mpn_addmul_1 mpn_addmul_1c mpn_submul_1 mpn_submul_1c)
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
C For DOS, on the stack we have four saved registers, return address,
C space for four register arguments, and finally the carry input.
IFDOS(` define(`carry_in', `72(%rsp)')') dnl
IFSTD(` define(`carry_in', `%r8')') dnl
ASM_START()
TEXT
ALIGN(16)
PROLOGUE(func_1c)
FUNC_ENTRY(4)
push %rbx
push %rbp
lea (%rdx), %rbx
neg %rbx
mov (up), %rax
mov (rp), %r10
lea -16(rp,%rdx,8), rp
lea (up,%rdx,8), up
mul %rcx
add carry_in, %rax
adc $0, %rdx
jmp L(start_nc)
EPILOGUE()
ALIGN(16)
PROLOGUE(func)
FUNC_ENTRY(4)
push %rbx
push %rbp
lea (%rdx), %rbx
neg %rbx
mov (up), %rax
mov (rp), %r10
lea -16(rp,%rdx,8), rp
lea (up,%rdx,8), up
mul %rcx
L(start_nc):
test $1, R8(%rbx)
jnz L(odd)
lea (%rax), %r11
mov 8(up,%rbx,8), %rax
lea (%rdx), %rbp
mul %rcx
add $2, %rbx
jz L(n2)
lea (%rax), %r8
mov (up,%rbx,8), %rax
lea (%rdx), %r9
jmp L(mid)
ALIGN(8)
L(odd): inc %rbx
jz L(n1)
lea (%rax), %r8
mov (up,%rbx,8), %rax
lea (%rdx), %r9
mul %rcx
lea (%rax), %r11
mov 8(up,%rbx,8), %rax
lea (%rdx), %rbp
jmp L(e)
ALIGN(16)
L(top): mul %rcx
ADDSUB %r8, %r10
lea (%rax), %r8
mov (up,%rbx,8), %rax
adc %r9, %r11
mov %r10, -8(rp,%rbx,8)
mov (rp,%rbx,8), %r10
lea (%rdx), %r9
adc $0, %rbp
L(mid): mul %rcx
ADDSUB %r11, %r10
lea (%rax), %r11
mov 8(up,%rbx,8), %rax
adc %rbp, %r8
mov %r10, (rp,%rbx,8)
mov 8(rp,%rbx,8), %r10
lea (%rdx), %rbp
adc $0, %r9
L(e): add $2, %rbx
js L(top)
mul %rcx
ADDSUB %r8, %r10
adc %r9, %r11
mov %r10, -8(rp)
adc %rbx, %rbp C rbx = 0
L(n2): mov (rp), %r10
ADDSUB %r11, %r10
adc %rbp, %rax
mov %r10, (rp)
adc %rbx, %rdx C rbx = 0
L(n1): mov 8(rp), %r10
ADDSUB %rax, %r10
mov %r10, 8(rp)
mov R32(%rbx), R32(%rax) C rbx = 0
adc %rdx, %rax
pop %rbp
pop %rbx
FUNC_EXIT()
ret
EPILOGUE()

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dnl X86-64 mpn_com.
dnl Copyright 2017 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
MULFUNC_PROLOGUE(mpn_com)
include_mpn(`x86_64/fastsse/com-palignr.asm')

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dnl X86-64 mpn_copyd.
dnl Copyright 2012 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
MULFUNC_PROLOGUE(mpn_copyd)
include_mpn(`x86_64/fastsse/copyd-palignr.asm')

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dnl X86-64 mpn_copyi.
dnl Copyright 2012 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
MULFUNC_PROLOGUE(mpn_copyi)
include_mpn(`x86_64/fastsse/copyi-palignr.asm')

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dnl x86-64 mpn_divrem_1 -- mpn by limb division.
dnl Copyright 2004, 2005, 2007-2010, 2012, 2014 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C norm unorm frac
C AMD K8,K9 15 15 12
C AMD K10 15 15 12
C Intel P4 44 44 43
C Intel core2 24 24 19.5
C Intel corei 19 19 18
C Intel atom 51 51 36
C VIA nano 46 44 22.5
C mp_limb_t
C mpn_divrem_1 (mp_ptr qp, mp_size_t fn,
C mp_srcptr np, mp_size_t nn, mp_limb_t d)
C mp_limb_t
C mpn_preinv_divrem_1 (mp_ptr qp, mp_size_t fn,
C mp_srcptr np, mp_size_t nn, mp_limb_t d,
C mp_limb_t dinv, int cnt)
C INPUT PARAMETERS
define(`qp', `%rdi')
define(`fn_param', `%rsi')
define(`up_param', `%rdx')
define(`un_param', `%rcx')
define(`d', `%r8')
define(`dinv', `%r9') C only for mpn_preinv_divrem_1
C shift passed on stack C only for mpn_preinv_divrem_1
define(`cnt', `%rcx')
define(`up', `%rsi')
define(`fn', `%r12')
define(`un', `%rbx')
C rax rbx rcx rdx rsi rdi rbp r8 r9 r10 r11 r12 r13 r14 r15
C cnt qp d dinv
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
IFSTD(`define(`CNTOFF', `40($1)')')
IFDOS(`define(`CNTOFF', `104($1)')')
ASM_START()
TEXT
ALIGN(16)
PROLOGUE(mpn_preinv_divrem_1)
FUNC_ENTRY(4)
IFDOS(` mov 56(%rsp), %r8 ')
IFDOS(` mov 64(%rsp), %r9 ')
xor R32(%rax), R32(%rax)
push %r13
push %r12
push %rbp
push %rbx
mov fn_param, fn
mov un_param, un
add fn_param, un_param
mov up_param, up
lea -8(qp,un_param,8), qp
mov CNTOFF(%rsp), R8(cnt)
shl R8(cnt), d
jmp L(ent)
EPILOGUE()
ALIGN(16)
PROLOGUE(mpn_divrem_1)
FUNC_ENTRY(4)
IFDOS(` mov 56(%rsp), %r8 ')
xor R32(%rax), R32(%rax)
push %r13
push %r12
push %rbp
push %rbx
mov fn_param, fn
mov un_param, un
add fn_param, un_param
mov up_param, up
je L(ret)
lea -8(qp,un_param,8), qp
xor R32(%rbp), R32(%rbp)
L(unnormalized):
test un, un
je L(44)
mov -8(up,un,8), %rax
cmp d, %rax
jae L(44)
mov %rbp, (qp)
mov %rax, %rbp
lea -8(qp), qp
je L(ret)
dec un
L(44):
bsr d, %rcx
not R32(%rcx)
sal R8(%rcx), d
sal R8(%rcx), %rbp
push %rcx
IFSTD(` push %rdi ')
IFSTD(` push %rsi ')
push %r8
IFSTD(` sub $8, %rsp ')
IFSTD(` mov d, %rdi ')
IFDOS(` sub $40, %rsp ')
IFDOS(` mov d, %rcx ')
ASSERT(nz, `test $15, %rsp')
CALL( mpn_invert_limb)
IFSTD(` add $8, %rsp ')
IFDOS(` add $40, %rsp ')
pop %r8
IFSTD(` pop %rsi ')
IFSTD(` pop %rdi ')
pop %rcx
mov %rax, dinv
mov %rbp, %rax
test un, un
je L(frac)
L(ent): mov -8(up,un,8), %rbp
shr R8(%rcx), %rax
shld R8(%rcx), %rbp, %rax
sub $2, un
js L(end)
ALIGN(16)
L(top): lea 1(%rax), %r11
mul dinv
mov (up,un,8), %r10
shld R8(%rcx), %r10, %rbp
mov %rbp, %r13
add %rax, %r13
adc %r11, %rdx
mov %rdx, %r11
imul d, %rdx
sub %rdx, %rbp
lea (d,%rbp), %rax
sub $8, qp
cmp %r13, %rbp
cmovc %rbp, %rax
adc $-1, %r11
cmp d, %rax
jae L(ufx)
L(uok): dec un
mov %r11, 8(qp)
mov %r10, %rbp
jns L(top)
L(end): lea 1(%rax), %r11
sal R8(%rcx), %rbp
mul dinv
add %rbp, %rax
adc %r11, %rdx
mov %rax, %r11
mov %rdx, %r13
imul d, %rdx
sub %rdx, %rbp
mov d, %rax
add %rbp, %rax
cmp %r11, %rbp
cmovc %rbp, %rax
adc $-1, %r13
cmp d, %rax
jae L(efx)
L(eok): mov %r13, (qp)
sub $8, qp
jmp L(frac)
L(ufx): sub d, %rax
inc %r11
jmp L(uok)
L(efx): sub d, %rax
inc %r13
jmp L(eok)
L(frac):mov d, %rbp
neg %rbp
jmp L(fent)
ALIGN(16) C K8-K10 P6-CNR P6-NHM P4
L(ftop):mul dinv C 0,12 0,17 0,17
add %r11, %rdx C 5 8 10
mov %rax, %r11 C 4 8 3
mov %rdx, %r13 C 6 9 11
imul %rbp, %rdx C 6 9 11
mov d, %rax C
add %rdx, %rax C 10 14 14
cmp %r11, %rdx C 10 14 14
cmovc %rdx, %rax C 11 15 15
adc $-1, %r13 C
mov %r13, (qp) C
sub $8, qp C
L(fent):lea 1(%rax), %r11 C
dec fn C
jns L(ftop) C
shr R8(%rcx), %rax
L(ret): pop %rbx
pop %rbp
pop %r12
pop %r13
FUNC_EXIT()
ret
EPILOGUE()

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dnl AMD64 mpn_gcd_11 optimised for Intel CNR, PNR, SBR, IBR.
dnl Based on the K7 gcd_1.asm, by Kevin Ryde. Rehacked for AMD64 by Torbjorn
dnl Granlund.
dnl Copyright 2000-2002, 2005, 2009, 2011, 2012, 2017, 2019 Free Software
dnl Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/bit (approx)
C AMD K8,K9 ?
C AMD K10 ?
C AMD bd1 ?
C AMD bd2 ?
C AMD bd3 ?
C AMD bd4 ?
C AMD bt1 ?
C AMD bt2 ?
C AMD zn1 ?
C AMD zn2 ?
C Intel P4 ?
C Intel CNR 4.22 *
C Intel PNR 4.22 *
C Intel NHM 4.97
C Intel WSM 5.17
C Intel SBR 4.83 *
C Intel IBR 4.16 *
C Intel HWL 3.84
C Intel BWL 3.76
C Intel SKL 3.83
C Intel atom ?
C Intel SLM ?
C Intel GLM ?
C Intel GLM+ ?
C VIA nano ?
define(`u0', `%rdi')
define(`v0', `%rsi')
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
ASM_START()
TEXT
ALIGN(64)
PROLOGUE(mpn_gcd_11)
FUNC_ENTRY(2)
jmp L(odd)
ALIGN(16)
L(top): cmovc %rdx, u0 C u = |u - v|
cmovc %rax, v0 C v = min(u,v)
shr R8(%rcx), u0
L(odd): mov v0, %rdx
sub u0, %rdx C v - u
bsf %rdx, %rcx
mov u0, %rax
sub v0, u0 C u - v
jnz L(top)
L(end): C rax = result
C rdx = 0 for the benefit of internal gcd_22 call
FUNC_EXIT()
ret
EPILOGUE()

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dnl AMD64 mpn_gcd_22. Assumes useful bsf, useful shrd, no tzcnt, no shlx.
dnl Copyright 2019 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/bit
C AMD K8,K9 ?
C AMD K10 ?
C AMD bd1 ?
C AMD bd2 ?
C AMD bd3 ?
C AMD bd4 ?
C AMD bt1 ?
C AMD bt2 ?
C AMD zn1 ?
C AMD zn2 ?
C Intel P4 ?
C Intel CNR 8.7
C Intel PNR 8.7
C Intel NHM 9.2
C Intel WSM 9.2
C Intel SBR 9.1
C Intel IBR ?
C Intel HWL ?
C Intel BWL ?
C Intel SKL ?
C Intel atom ?
C Intel SLM ?
C Intel GLM ?
C Intel GLM+ ?
C VIA nano ?
define(`u1', `%rdi')
define(`u0', `%rsi')
define(`v1', `%rdx')
define(`v0_param', `%rcx')
define(`v0', `%rax')
define(`cnt', `%rcx')
define(`s0', `%r8')
define(`s1', `%r9')
define(`t0', `%r10')
define(`t1', `%r11')
dnl ABI_SUPPORT(DOS64) C returns mp_double_limb_t in memory
ABI_SUPPORT(STD64)
ASM_START()
TEXT
ALIGN(64)
PROLOGUE(mpn_gcd_22)
FUNC_ENTRY(4)
mov v0_param, v0
ALIGN(16)
L(top): mov v0, t0
sub u0, t0
jz L(lowz) C jump when low limb result = 0
mov v1, t1
sbb u1, t1
mov u0, s0
mov u1, s1
bsf t0, cnt
sub v0, u0
sbb v1, u1
L(bck): cmovc t0, u0 C u = |u - v|
cmovc t1, u1 C u = |u - v|
cmovc s0, v0 C v = min(u,v)
cmovc s1, v1 C v = min(u,v)
shrd R8(cnt), u1, u0
shr R8(cnt), u1
mov v1, t1
or u1, t1
jnz L(top)
L(gcd_11):
mov v0, %rdi
C mov u0, %rsi
TCALL( mpn_gcd_11)
L(lowz):C We come here when v0 - u0 = 0
C 1. If v1 - u1 = 0, then gcd is u = v.
C 2. Else compute gcd_21({v1,v0}, |u1-v1|)
mov v1, t0
sub u1, t0
je L(end)
xor t1, t1
mov u0, s0
mov u1, s1
bsf t0, cnt
mov u1, u0
xor u1, u1
sub v1, u0
jmp L(bck)
L(end): C mov v0, %rax
C mov v1, %rdx
FUNC_EXIT()
ret
EPILOGUE()

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/* Core 2 gmp-mparam.h -- Compiler/machine parameter header file.
Copyright 2019 Free Software Foundation, Inc.
This file is part of the GNU MP Library.
The GNU MP Library is free software; you can redistribute it and/or modify
it under the terms of either:
* the GNU Lesser General Public License as published by the Free
Software Foundation; either version 3 of the License, or (at your
option) any later version.
or
* the GNU General Public License as published by the Free Software
Foundation; either version 2 of the License, or (at your option) any
later version.
or both in parallel, as here.
The GNU MP Library is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
for more details.
You should have received copies of the GNU General Public License and the
GNU Lesser General Public License along with the GNU MP Library. If not,
see https://www.gnu.org/licenses/. */
#define GMP_LIMB_BITS 64
#define GMP_LIMB_BYTES 8
/* 3000 MHz Penryn */
/* FFT tuning limit = 116,220,984 */
/* Generated by tuneup.c, 2019-10-18, gcc 8.3 */
#define MOD_1_NORM_THRESHOLD 0 /* always */
#define MOD_1_UNNORM_THRESHOLD 0 /* always */
#define MOD_1N_TO_MOD_1_1_THRESHOLD 3
#define MOD_1U_TO_MOD_1_1_THRESHOLD 2
#define MOD_1_1_TO_MOD_1_2_THRESHOLD 11
#define MOD_1_2_TO_MOD_1_4_THRESHOLD 18
#define PREINV_MOD_1_TO_MOD_1_THRESHOLD 8
#define USE_PREINV_DIVREM_1 1 /* native */
#define DIV_QR_1_NORM_THRESHOLD 3
#define DIV_QR_1_UNNORM_THRESHOLD MP_SIZE_T_MAX /* never */
#define DIV_QR_2_PI2_THRESHOLD 16
#define DIVEXACT_1_THRESHOLD 0 /* always (native) */
#define BMOD_1_TO_MOD_1_THRESHOLD 26
#define DIV_1_VS_MUL_1_PERCENT 284
#define MUL_TOOM22_THRESHOLD 24
#define MUL_TOOM33_THRESHOLD 65
#define MUL_TOOM44_THRESHOLD 184
#define MUL_TOOM6H_THRESHOLD 256
#define MUL_TOOM8H_THRESHOLD 381
#define MUL_TOOM32_TO_TOOM43_THRESHOLD 73
#define MUL_TOOM32_TO_TOOM53_THRESHOLD 122
#define MUL_TOOM42_TO_TOOM53_THRESHOLD 73
#define MUL_TOOM42_TO_TOOM63_THRESHOLD 79
#define MUL_TOOM43_TO_TOOM54_THRESHOLD 106
#define SQR_BASECASE_THRESHOLD 0 /* always (native) */
#define SQR_TOOM2_THRESHOLD 28
#define SQR_TOOM3_THRESHOLD 102
#define SQR_TOOM4_THRESHOLD 160
#define SQR_TOOM6_THRESHOLD 366
#define SQR_TOOM8_THRESHOLD 478
#define MULMID_TOOM42_THRESHOLD 32
#define MULMOD_BNM1_THRESHOLD 11
#define SQRMOD_BNM1_THRESHOLD 17
#define MUL_FFT_MODF_THRESHOLD 368 /* k = 5 */
#define MUL_FFT_TABLE3 \
{ { 368, 5}, { 17, 6}, { 9, 5}, { 19, 6}, \
{ 10, 5}, { 21, 6}, { 11, 5}, { 23, 6}, \
{ 21, 7}, { 11, 6}, { 23, 7}, { 12, 6}, \
{ 25, 7}, { 21, 8}, { 11, 7}, { 24, 8}, \
{ 13, 7}, { 27, 8}, { 15, 7}, { 31, 8}, \
{ 19, 7}, { 39, 8}, { 21, 9}, { 11, 8}, \
{ 27, 9}, { 15, 8}, { 35, 9}, { 19, 8}, \
{ 41, 9}, { 23, 8}, { 47, 9}, { 27,10}, \
{ 15, 9}, { 39,10}, { 23, 9}, { 51,11}, \
{ 15,10}, { 31, 9}, { 67,10}, { 39, 9}, \
{ 83,10}, { 47, 9}, { 95,11}, { 31,10}, \
{ 79,11}, { 47,10}, { 95,12}, { 31, 9}, \
{ 255,10}, { 135,11}, { 79,10}, { 159, 9}, \
{ 319,11}, { 95,10}, { 191, 9}, { 383,11}, \
{ 111,12}, { 63,11}, { 127,10}, { 271,11}, \
{ 143,10}, { 287, 9}, { 575,10}, { 303,11}, \
{ 159,10}, { 319,12}, { 95,11}, { 191,10}, \
{ 383,11}, { 207,10}, { 415,13}, { 63,12}, \
{ 127,11}, { 271,10}, { 543,11}, { 287,10}, \
{ 575,11}, { 319,10}, { 639,11}, { 351,12}, \
{ 191,11}, { 415,12}, { 223,11}, { 479,13}, \
{ 127,12}, { 255,11}, { 543,12}, { 287,11}, \
{ 607,12}, { 319,11}, { 639,12}, { 351,11}, \
{ 703,13}, { 191,12}, { 479,14}, { 127,13}, \
{ 255,12}, { 575,13}, { 319,12}, { 703,13}, \
{ 383,12}, { 799,13}, { 447,12}, { 959,14}, \
{ 255,13}, { 511,12}, { 1023,13}, { 575,12}, \
{ 1151,13}, { 703,14}, { 383,13}, { 831,12}, \
{ 1663,13}, { 959,15}, { 255,14}, { 511,13}, \
{ 1087,12}, { 2175,13}, { 1215,14}, { 639,13}, \
{ 1343,12}, { 2687,13}, { 1471,14}, { 767,13}, \
{ 1663,14}, { 895,13}, { 1791,15}, { 511,14}, \
{ 1023,13}, { 2175,14}, { 1151,13}, { 2431,12}, \
{ 4863,14}, { 1279,13}, { 2559,14}, { 1407,13}, \
{ 2815,15}, { 767,14}, { 1663,13}, { 3455,12}, \
{ 6911,14}, { 1791,16}, { 511,15}, { 1023,14}, \
{ 2431,13}, { 4863,15}, { 1279,14}, { 2943,13}, \
{ 5887,12}, { 11775,15}, { 1535,14}, { 3455,13}, \
{ 6911,15}, { 1791,14}, { 3839,13}, { 7679,16}, \
{ 1023,15}, { 2047,14}, { 4223,15}, { 2303,14}, \
{ 4991,15}, { 2815,14}, { 5887,13}, { 11775,16}, \
{ 1535,15}, { 3327,14}, { 6911,15}, { 32768,16}, \
{ 65536,17}, { 131072,18}, { 262144,19}, { 524288,20}, \
{1048576,21}, {2097152,22}, {4194304,23}, {8388608,24} }
#define MUL_FFT_TABLE3_SIZE 176
#define MUL_FFT_THRESHOLD 4736
#define SQR_FFT_MODF_THRESHOLD 308 /* k = 5 */
#define SQR_FFT_TABLE3 \
{ { 308, 5}, { 17, 6}, { 23, 7}, { 12, 6}, \
{ 25, 7}, { 21, 8}, { 11, 7}, { 25, 8}, \
{ 13, 7}, { 27, 8}, { 15, 7}, { 31, 8}, \
{ 21, 9}, { 11, 8}, { 27, 9}, { 15, 8}, \
{ 33, 9}, { 19, 8}, { 41, 9}, { 23, 8}, \
{ 47, 9}, { 27,10}, { 15, 9}, { 39,10}, \
{ 23, 9}, { 51,11}, { 15,10}, { 31, 9}, \
{ 63,10}, { 39, 9}, { 79,10}, { 47,11}, \
{ 31,10}, { 79,11}, { 47,12}, { 31,11}, \
{ 63,10}, { 127, 9}, { 255,11}, { 79,10}, \
{ 159, 6}, { 2559, 7}, { 1343, 6}, { 2687, 7}, \
{ 1407, 9}, { 383,12}, { 63,11}, { 127,10}, \
{ 255, 9}, { 511,10}, { 271, 9}, { 543,11}, \
{ 143,10}, { 287, 9}, { 575,11}, { 159,10}, \
{ 319,11}, { 175,12}, { 95,11}, { 191,10}, \
{ 383,11}, { 207,10}, { 415,13}, { 63,12}, \
{ 127,11}, { 255,10}, { 511,11}, { 271,10}, \
{ 543,11}, { 287,10}, { 575,12}, { 159,11}, \
{ 319,10}, { 639,11}, { 351,12}, { 191,11}, \
{ 383,10}, { 767,11}, { 415,12}, { 223,11}, \
{ 479,13}, { 127,12}, { 255,11}, { 543,12}, \
{ 287,11}, { 575,12}, { 319,11}, { 639,12}, \
{ 351,13}, { 191,12}, { 383,11}, { 767,12}, \
{ 479,14}, { 127,13}, { 255,12}, { 575,13}, \
{ 319,12}, { 703,13}, { 383,12}, { 799,13}, \
{ 447,12}, { 895,14}, { 255,13}, { 511,12}, \
{ 1023,13}, { 575,12}, { 1151,13}, { 639,12}, \
{ 1279,13}, { 703,14}, { 383,13}, { 767,12}, \
{ 1535,13}, { 959,15}, { 255,14}, { 511,13}, \
{ 1087,12}, { 2175,13}, { 1215,14}, { 639,13}, \
{ 1343,12}, { 2687,13}, { 1407,14}, { 767,13}, \
{ 1599,12}, { 3199,13}, { 1663,14}, { 895,15}, \
{ 511,14}, { 1023,13}, { 2175,14}, { 1151,13}, \
{ 2303,12}, { 4607,13}, { 2431,12}, { 4863,14}, \
{ 1279,13}, { 2687,14}, { 1407,15}, { 767,14}, \
{ 1535,13}, { 3199,14}, { 1663,13}, { 3455,12}, \
{ 6911,16}, { 511,15}, { 1023,14}, { 2303,13}, \
{ 4607,14}, { 2431,13}, { 4863,15}, { 1279,14}, \
{ 2943,13}, { 5887,12}, { 11775,15}, { 1535,14}, \
{ 3455,15}, { 1791,14}, { 3583,13}, { 7167,14}, \
{ 3839,16}, { 1023,15}, { 2047,14}, { 4223,15}, \
{ 2303,14}, { 4863,15}, { 2815,14}, { 5887,13}, \
{ 11775,16}, { 1535,15}, { 3071,14}, { 6143,15}, \
{ 3327,14}, { 6911,15}, { 32768,16}, { 65536,17}, \
{ 131072,18}, { 262144,19}, { 524288,20}, {1048576,21}, \
{2097152,22}, {4194304,23}, {8388608,24} }
#define SQR_FFT_TABLE3_SIZE 183
#define SQR_FFT_THRESHOLD 3520
#define MULLO_BASECASE_THRESHOLD 0 /* always */
#define MULLO_DC_THRESHOLD 67
#define MULLO_MUL_N_THRESHOLD 9174
#define SQRLO_BASECASE_THRESHOLD 10
#define SQRLO_DC_THRESHOLD 11
#define SQRLO_SQR_THRESHOLD 7035
#define DC_DIV_QR_THRESHOLD 53
#define DC_DIVAPPR_Q_THRESHOLD 163
#define DC_BDIV_QR_THRESHOLD 46
#define DC_BDIV_Q_THRESHOLD 76
#define INV_MULMOD_BNM1_THRESHOLD 46
#define INV_NEWTON_THRESHOLD 158
#define INV_APPR_THRESHOLD 167
#define BINV_NEWTON_THRESHOLD 248
#define REDC_1_TO_REDC_N_THRESHOLD 44
#define MU_DIV_QR_THRESHOLD 1187
#define MU_DIVAPPR_Q_THRESHOLD 1210
#define MUPI_DIV_QR_THRESHOLD 73
#define MU_BDIV_QR_THRESHOLD 1017
#define MU_BDIV_Q_THRESHOLD 1187
#define POWM_SEC_TABLE 1,64,105,579,1486
#define GET_STR_DC_THRESHOLD 12
#define GET_STR_PRECOMPUTE_THRESHOLD 17
#define SET_STR_DC_THRESHOLD 134
#define SET_STR_PRECOMPUTE_THRESHOLD 1752
#define FAC_DSC_THRESHOLD 351
#define FAC_ODD_THRESHOLD 27
#define MATRIX22_STRASSEN_THRESHOLD 18
#define HGCD2_DIV1_METHOD 3 /* 2.14% faster than 5 */
#define HGCD_THRESHOLD 118
#define HGCD_APPR_THRESHOLD 161
#define HGCD_REDUCE_THRESHOLD 2121
#define GCD_DC_THRESHOLD 416
#define GCDEXT_DC_THRESHOLD 351
#define JACOBI_BASE_METHOD 4 /* 3.56% faster than 1 */
/* Tuneup completed successfully, took 132491 seconds */

210
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dnl AMD64 SSSE3 mpn_hamdist -- hamming distance.
dnl Copyright 2010-2017 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/limb good for cpu?
C AMD K8,K9 n/a
C AMD K10 n/a
C AMD bd1 ?
C AMD bd2 ?
C AMD bd3 ?
C AMD bd4 ?
C AMD zen ?
C AMD bobcat ?
C AMD jaguar ?
C Intel P4 n/a
C Intel CNR 4.50 y
C Intel PNR 3.28 y
C Intel NHM ?
C Intel SBR ?
C Intel IBR ?
C Intel HWL ?
C Intel BWL ?
C Intel SKL ?
C Intel atom ?
C Intel SLM ?
C VIA nano ?
C TODO
C * This was hand-written without too much thought about optimal insn
C selection; check to see of it can be improved.
C * Consider doing some instruction scheduling.
define(`up', `%rdi')
define(`vp', `%rsi')
define(`n', `%rdx')
ASM_START()
TEXT
ALIGN(32)
PROLOGUE(mpn_hamdist)
lea L(cnsts)(%rip), %r9
ifdef(`PIC', `define(`OFF1',32) define(`OFF2',48)',
`define(`OFF1',64) define(`OFF2',80)')
movdqa OFF1`'(%r9), %xmm7
movdqa OFF2`'(%r9), %xmm6
pxor %xmm4, %xmm4
pxor %xmm5, %xmm5
pxor %xmm8, %xmm8
mov R32(n), R32(%rax)
and $7, R32(%rax)
ifdef(`PIC',`
movslq (%r9,%rax,4), %rax
add %r9, %rax
jmp *%rax
',`
jmp *(%r9,%rax,8)
')
L(1): movq (up), %xmm1
add $8, up
movq (vp), %xmm10
add $8, vp
pxor %xmm10, %xmm1
jmp L(e1)
L(2): add $-48, up
add $-48, vp
jmp L(e2)
L(3): movq (up), %xmm1
add $-40, up
movq (vp), %xmm10
add $-40, vp
pxor %xmm10, %xmm1
jmp L(e3)
L(4): add $-32, up
add $-32, vp
jmp L(e4)
L(5): movq (up), %xmm1
add $-24, up
movq (vp), %xmm10
add $-24, vp
pxor %xmm10, %xmm1
jmp L(e5)
L(6): add $-16, up
add $-16, vp
jmp L(e6)
L(7): movq (up), %xmm1
add $-8, up
movq (vp), %xmm10
add $-8, vp
pxor %xmm10, %xmm1
jmp L(e7)
ALIGN(32)
L(top): lddqu (up), %xmm1
lddqu (vp), %xmm10
pxor %xmm10, %xmm1
L(e7): movdqa %xmm6, %xmm0 C copy mask register
movdqa %xmm7, %xmm2 C copy count register
movdqa %xmm7, %xmm3 C copy count register
pand %xmm1, %xmm0
psrlw $4, %xmm1
pand %xmm6, %xmm1
pshufb %xmm0, %xmm2
pshufb %xmm1, %xmm3
paddb %xmm2, %xmm3
paddb %xmm3, %xmm4
L(e6): lddqu 16(up), %xmm1
lddqu 16(vp), %xmm10
pxor %xmm10, %xmm1
L(e5): movdqa %xmm6, %xmm0
movdqa %xmm7, %xmm2
movdqa %xmm7, %xmm3
pand %xmm1, %xmm0
psrlw $4, %xmm1
pand %xmm6, %xmm1
pshufb %xmm0, %xmm2
pshufb %xmm1, %xmm3
paddb %xmm2, %xmm3
paddb %xmm3, %xmm4
L(e4): lddqu 32(up), %xmm1
lddqu 32(vp), %xmm10
pxor %xmm10, %xmm1
L(e3): movdqa %xmm6, %xmm0
movdqa %xmm7, %xmm2
movdqa %xmm7, %xmm3
pand %xmm1, %xmm0
psrlw $4, %xmm1
pand %xmm6, %xmm1
pshufb %xmm0, %xmm2
pshufb %xmm1, %xmm3
paddb %xmm2, %xmm3
paddb %xmm3, %xmm4
L(e2): lddqu 48(up), %xmm1
add $64, up
lddqu 48(vp), %xmm10
add $64, vp
pxor %xmm10, %xmm1
L(e1): movdqa %xmm6, %xmm0
movdqa %xmm7, %xmm2
movdqa %xmm7, %xmm3
pand %xmm1, %xmm0
psrlw $4, %xmm1
pand %xmm6, %xmm1
pshufb %xmm0, %xmm2
pshufb %xmm1, %xmm3
psadbw %xmm5, %xmm4 C sum to 8 x 16-bit counts
paddb %xmm2, %xmm3
paddq %xmm4, %xmm8 C sum to 2 x 64-bit counts
movdqa %xmm3, %xmm4
sub $8, n
jg L(top)
psadbw %xmm5, %xmm4
paddq %xmm4, %xmm8
pshufd $14, %xmm8, %xmm0
paddq %xmm8, %xmm0
movd %xmm0, %rax
ret
EPILOGUE()
DEF_OBJECT(L(cnsts),16,`JUMPTABSECT')
JMPENT( L(top), L(cnsts))
JMPENT( L(1), L(cnsts))
JMPENT( L(2), L(cnsts))
JMPENT( L(3), L(cnsts))
JMPENT( L(4), L(cnsts))
JMPENT( L(5), L(cnsts))
JMPENT( L(6), L(cnsts))
JMPENT( L(7), L(cnsts))
.byte 0x00,0x01,0x01,0x02,0x01,0x02,0x02,0x03
.byte 0x01,0x02,0x02,0x03,0x02,0x03,0x03,0x04
.byte 0x0f,0x0f,0x0f,0x0f,0x0f,0x0f,0x0f,0x0f
.byte 0x0f,0x0f,0x0f,0x0f,0x0f,0x0f,0x0f,0x0f
END_OBJECT(L(cnsts))

285
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dnl AMD64 logops.
dnl Copyright 2004-2017 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C c/l c/l c/l good
C var-1 var-2 var-3 for cpu?
C AMD K8,K9
C AMD K10 1.52 1.75 1.75 n
C AMD bd1
C AMD bd2
C AMD bd3
C AMD bd4
C AMD bt1 2.67 ~2.79 ~2.79 =
C AMD bt2 2.15 2.65 2.65 n
C AMD zen 1.5 1.5 1.5 =
C Intel P4
C Intel PNR 2.0 2.0 2.0 =
C Intel NHM 2.0 2.0 2.0 =
C Intel SBR 1.5 1.5 1.5 y
C Intel IBR 1.47 1.48 1.48 y
C Intel HWL 1.11 1.35 1.35 y
C Intel BWL 1.09 1.30 1.30 y
C Intel SKL 1.21 1.27 1.27 y
C Intel atom 3.31 3.57 3.57 y
C Intel SLM 3.0 3.0 3.0 =
C VIA nano
ifdef(`OPERATION_and_n',`
define(`func',`mpn_and_n')
define(`VARIANT_1')
define(`LOGOP',`and')')
ifdef(`OPERATION_andn_n',`
define(`func',`mpn_andn_n')
define(`VARIANT_2')
define(`LOGOP',`and')')
ifdef(`OPERATION_nand_n',`
define(`func',`mpn_nand_n')
define(`VARIANT_3')
define(`LOGOP',`and')')
ifdef(`OPERATION_ior_n',`
define(`func',`mpn_ior_n')
define(`VARIANT_1')
define(`LOGOP',`or')')
ifdef(`OPERATION_iorn_n',`
define(`func',`mpn_iorn_n')
define(`VARIANT_2')
define(`LOGOP',`or')')
ifdef(`OPERATION_nior_n',`
define(`func',`mpn_nior_n')
define(`VARIANT_3')
define(`LOGOP',`or')')
ifdef(`OPERATION_xor_n',`
define(`func',`mpn_xor_n')
define(`VARIANT_1')
define(`LOGOP',`xor')')
ifdef(`OPERATION_xnor_n',`
define(`func',`mpn_xnor_n')
define(`VARIANT_2')
define(`LOGOP',`xor')')
define(`addptr', `lea $1($2), $2')
MULFUNC_PROLOGUE(mpn_and_n mpn_andn_n mpn_nand_n mpn_ior_n mpn_iorn_n mpn_nior_n mpn_xor_n mpn_xnor_n)
C INPUT PARAMETERS
define(`rp',`%rdi')
define(`up',`%rsi')
define(`vp',`%rdx')
define(`n',`%rcx')
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
ASM_START()
ifdef(`VARIANT_1',`
TEXT
ALIGN(32)
PROLOGUE(func)
FUNC_ENTRY(4)
mov (vp), %r8
mov R32(%rcx), R32(%rax)
and $3, R32(%rax)
je L(b00)
cmp $2, R32(%rax)
jc L(b01)
je L(b10)
L(b11): LOGOP (up), %r8
mov %r8, (rp)
inc n
addptr( -8, up)
addptr( -8, vp)
addptr( -8, rp)
jmp L(e11)
L(b10): add $2, n
addptr( -16, up)
addptr( -16, vp)
addptr( -16, rp)
jmp L(e10)
L(b01): LOGOP (up), %r8
mov %r8, (rp)
dec n
jz L(ret)
addptr( 8, up)
addptr( 8, vp)
addptr( 8, rp)
ALIGN(16)
L(top): mov (vp), %r8
L(b00): mov 8(vp), %r9
LOGOP (up), %r8
LOGOP 8(up), %r9
mov %r8, (rp)
mov %r9, 8(rp)
L(e11): mov 16(vp), %r8
L(e10): mov 24(vp), %r9
addptr( 32, vp)
LOGOP 16(up), %r8
LOGOP 24(up), %r9
addptr( 32, up)
mov %r8, 16(rp)
mov %r9, 24(rp)
addptr( 32, rp)
sub $4, n
jnz L(top)
L(ret): FUNC_EXIT()
ret
EPILOGUE()
')
ifdef(`VARIANT_2',`
TEXT
ALIGN(32)
PROLOGUE(func)
FUNC_ENTRY(4)
mov (vp), %r8
not %r8
mov R32(%rcx), R32(%rax)
and $3, R32(%rax)
je L(b00)
cmp $2, R32(%rax)
jc L(b01)
je L(b10)
L(b11): LOGOP (up), %r8
mov %r8, (rp)
inc n
addptr( -8, up)
addptr( -8, vp)
addptr( -8, rp)
jmp L(e11)
L(b10): add $2, n
addptr( -16, up)
addptr( -16, vp)
addptr( -16, rp)
jmp L(e10)
L(b01): LOGOP (up), %r8
mov %r8, (rp)
dec n
jz L(ret)
addptr( 8, up)
addptr( 8, vp)
addptr( 8, rp)
ALIGN(16)
L(top): mov (vp), %r8
not %r8
L(b00): mov 8(vp), %r9
not %r9
LOGOP (up), %r8
LOGOP 8(up), %r9
mov %r8, (rp)
mov %r9, 8(rp)
L(e11): mov 16(vp), %r8
not %r8
L(e10): mov 24(vp), %r9
not %r9
addptr( 32, vp)
LOGOP 16(up), %r8
LOGOP 24(up), %r9
addptr( 32, up)
mov %r8, 16(rp)
mov %r9, 24(rp)
addptr( 32, rp)
sub $4, n
jnz L(top)
L(ret): FUNC_EXIT()
ret
EPILOGUE()
')
ifdef(`VARIANT_3',`
TEXT
ALIGN(32)
PROLOGUE(func)
FUNC_ENTRY(4)
mov (vp), %r8
mov R32(%rcx), R32(%rax)
and $3, R32(%rax)
je L(b00)
cmp $2, R32(%rax)
jc L(b01)
je L(b10)
L(b11): LOGOP (up), %r8
not %r8
mov %r8, (rp)
inc n
addptr( -8, up)
addptr( -8, vp)
addptr( -8, rp)
jmp L(e11)
L(b10): add $2, n
addptr( -16, up)
addptr( -16, vp)
addptr( -16, rp)
jmp L(e10)
L(b01): LOGOP (up), %r8
not %r8
mov %r8, (rp)
dec n
jz L(ret)
addptr( 8, up)
addptr( 8, vp)
addptr( 8, rp)
ALIGN(16)
L(top): mov (vp), %r8
L(b00): mov 8(vp), %r9
LOGOP (up), %r8
not %r8
LOGOP 8(up), %r9
not %r9
mov %r8, (rp)
mov %r9, 8(rp)
L(e11): mov 16(vp), %r8
L(e10): mov 24(vp), %r9
addptr( 32, vp)
LOGOP 16(up), %r8
not %r8
LOGOP 24(up), %r9
addptr( 32, up)
not %r9
mov %r8, 16(rp)
mov %r9, 24(rp)
addptr( 32, rp)
sub $4, n
jnz L(top)
L(ret): FUNC_EXIT()
ret
EPILOGUE()
')

145
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dnl x86-64 mpn_lshift optimised for Conroe/Penryn and Nehalem.
dnl Copyright 2007, 2009, 2011, 2012, 2017 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/limb
C AMD K8,K9
C AMD K10
C AMD bd1
C AMD bd2
C AMD bd3
C AMD bd4
C AMD zen
C AMD bobcat
C AMD jaguar
C Intel P4
C Intel core2 1.32
C Intel NHM 1.30 (drops to 2.5 for n > 256)
C Intel SBR
C Intel IBR
C Intel HWL
C Intel BWL
C Intel SKL
C Intel atom
C Intel SLM
C VIA nano
C INPUT PARAMETERS
define(`rp', `%rdi')
define(`up', `%rsi')
define(`n', `%rdx')
define(`cnt', `%rcx')
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
ASM_START()
TEXT
ALIGN(16)
PROLOGUE(mpn_lshift)
FUNC_ENTRY(4)
xor R32(%rax), R32(%rax)
test $1, R8(n)
jnz L(bx1)
L(bx0): test $2, R8(n)
jnz L(b10)
L(b00): lea -8(up,n,8), up
lea 16(rp,n,8), rp
mov (up), %r10
mov -8(up), %r11
shld R8(cnt), %r10, %rax
mov -16(up), %r8
shr $2, n
jmp L(00)
L(bx1): test $2, R8(n)
jnz L(b11)
L(b01): lea -16(up,n,8), up
lea 8(rp,n,8), rp
mov 8(up), %r9
shld R8(cnt), %r9, %rax
shr $2, n
jz L(1)
mov (up), %r10
mov -8(up), %r11
jmp L(01)
L(b10): lea -24(up,n,8), up
lea (rp,n,8), rp
mov 16(up), %r8
mov 8(up), %r9
shld R8(cnt), %r8, %rax
shr $2, n
jz L(2)
mov (up), %r10
jmp L(10)
ALIGN(16)
L(b11): lea -32(up,n,8), up
lea -8(rp,n,8), rp
mov 24(up), %r11
mov 16(up), %r8
mov 8(up), %r9
shld R8(cnt), %r11, %rax
shr $2, n
jz L(end)
ALIGN(16)
L(top): shld R8(cnt), %r8, %r11
mov (up), %r10
mov %r11, (rp)
L(10): shld R8(cnt), %r9, %r8
mov -8(up), %r11
mov %r8, -8(rp)
L(01): shld R8(cnt), %r10, %r9
mov -16(up), %r8
mov %r9, -16(rp)
L(00): shld R8(cnt), %r11, %r10
mov -24(up), %r9
add $-32, up
mov %r10, -24(rp)
add $-32, rp
dec n
jnz L(top)
L(end): shld R8(cnt), %r8, %r11
mov %r11, (rp)
L(2): shld R8(cnt), %r9, %r8
mov %r8, -8(rp)
L(1): shl R8(cnt), %r9
mov %r9, -16(rp)
FUNC_EXIT()
ret
EPILOGUE()

159
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@@ -0,0 +1,159 @@
dnl x86-64 mpn_lshiftc optimised for Conroe/Penryn and Nehalem.
dnl Copyright 2007, 2009, 2011, 2012, 2017 Free Software Foundation, Inc.
dnl This file is part of the GNU MP Library.
dnl
dnl The GNU MP Library is free software; you can redistribute it and/or modify
dnl it under the terms of either:
dnl
dnl * the GNU Lesser General Public License as published by the Free
dnl Software Foundation; either version 3 of the License, or (at your
dnl option) any later version.
dnl
dnl or
dnl
dnl * the GNU General Public License as published by the Free Software
dnl Foundation; either version 2 of the License, or (at your option) any
dnl later version.
dnl
dnl or both in parallel, as here.
dnl
dnl The GNU MP Library is distributed in the hope that it will be useful, but
dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
dnl for more details.
dnl
dnl You should have received copies of the GNU General Public License and the
dnl GNU Lesser General Public License along with the GNU MP Library. If not,
dnl see https://www.gnu.org/licenses/.
include(`../config.m4')
C cycles/limb
C AMD K8,K9
C AMD K10
C AMD bd1
C AMD bd2
C AMD bd3
C AMD bd4
C AMD zen
C AMD bobcat
C AMD jaguar
C Intel P4
C Intel core2 1.52
C Intel NHM 1.78 (just 2.15 for n < 256)
C Intel SBR
C Intel IBR
C Intel HWL
C Intel BWL
C Intel SKL
C Intel atom
C Intel SLM
C VIA nano
C INPUT PARAMETERS
define(`rp', `%rdi')
define(`up', `%rsi')
define(`n', `%rdx')
define(`cnt', `%rcx')
C TODO
C * This runs poorly on Nehalem compared to plain lshift, in particular for
C n < 256.
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
ASM_START()
TEXT
ALIGN(16)
PROLOGUE(mpn_lshiftc)
FUNC_ENTRY(4)
xor R32(%rax), R32(%rax)
test $1, R8(n)
jnz L(bx1)
L(bx0): test $2, R8(n)
jnz L(b10)
L(b00): lea -8(up,n,8), up
lea 16(rp,n,8), rp
mov (up), %r10
mov -8(up), %r11
shld R8(cnt), %r10, %rax
mov -16(up), %r8
shr $2, n
shld R8(cnt), %r11, %r10
jmp L(00)
L(bx1): test $2, R8(n)
jnz L(b11)
L(b01): lea -16(up,n,8), up
lea 8(rp,n,8), rp
mov 8(up), %r9
shld R8(cnt), %r9, %rax
shr $2, n
jz L(1)
mov (up), %r10
mov -8(up), %r11
shld R8(cnt), %r10, %r9
jmp L(01)
L(b10): lea -24(up,n,8), up
lea (rp,n,8), rp
mov 16(up), %r8
mov 8(up), %r9
shld R8(cnt), %r8, %rax
shr $2, n
jz L(2)
mov (up), %r10
shld R8(cnt), %r9, %r8
jmp L(10)
ALIGN(16)
L(b11): lea -32(up,n,8), up
lea -8(rp,n,8), rp
mov 24(up), %r11
mov 16(up), %r8
mov 8(up), %r9
shld R8(cnt), %r11, %rax
shr $2, n
jz L(end)
ALIGN(16)
L(top): shld R8(cnt), %r8, %r11
mov (up), %r10
not %r11
shld R8(cnt), %r9, %r8
mov %r11, (rp)
L(10): mov -8(up), %r11
not %r8
shld R8(cnt), %r10, %r9
mov %r8, -8(rp)
L(01): mov -16(up), %r8
not %r9
shld R8(cnt), %r11, %r10
mov %r9, -16(rp)
L(00): mov -24(up), %r9
not %r10
add $-32, up
mov %r10, -24(rp)
add $-32, rp
dec n
jnz L(top)
L(end): shld R8(cnt), %r8, %r11
not %r11
mov %r11, (rp)
L(2): shld R8(cnt), %r9, %r8
not %r8
mov %r8, -8(rp)
L(1): shl R8(cnt), %r9
not %r9
mov %r9, -16(rp)
FUNC_EXIT()
ret
EPILOGUE()

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