wangdequan/linuxcncWebWASM
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Align AXIS control flow and fix pause and program rendering

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Document source UI gates, explicit native live-plot clearing, and remaining parity boundaries. Fix pause/resume transport continuity, repeated stepping, coordinate previews, and spindle override state. Optimize large program snapshots and rendering, and cover the control flows with native Tcl, WASM, and browser checks.

Validation: 22 native tests and source/browser checks pass. Worker/App regression: 113 of 123 pass; 10 pre-existing failures remain documented with no new failures.
This commit is contained in:
wangdequan
2026-09-08 10:46:27 +08:00
parent 845075f4a3
commit bade560372
55 changed files with 2495 additions and 286 deletions
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15
wasm-core/tests/sim_interpreter_test.c
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@@ -64,6 +64,9 @@ int main(void) {
assert(fabs(interpreter.state.x - 11.0) < 1e-12);
assert(fabs(interpreter.state.y - 22.0) < 1e-12);
assert(fabs(interpreter.state.z - 33.0) < 1e-12);
assert(sim_interpreter_read_motion(&interpreter, &motion) == SIM_INTERP_OK);
assert(fabs(motion.end.tran.x - 11.0) < 1e-12);
assert(fabs(motion.end.tran.y - 22.0) < 1e-12);
assert(sim_interpreter_execute(&interpreter, "G53 G0 X0 Y0 Z10", (uint32_t)(sizeof("G53 G0 X0 Y0 Z10") - 1)) == SIM_INTERP_OK);
assert(fabs(interpreter.state.x) < 1e-12 && fabs(interpreter.state.y) < 1e-12 && fabs(interpreter.state.z - 10.0) < 1e-12);
assert(sim_interpreter_execute(&interpreter, "G10 L20 P0 X0 Y0 Z10", (uint32_t)(sizeof("G10 L20 P0 X0 Y0 Z10") - 1)) == SIM_INTERP_OK);
@@ -78,5 +81,17 @@ int main(void) {
assert(sim_interpreter_execute(&interpreter, "G80 M7", (uint32_t)(sizeof("G80 M7") - 1)) == SIM_INTERP_OK);
assert(sim_interpreter_execute(&interpreter, "M8", 2) == SIM_INTERP_OK);
assert(sim_interpreter_execute(&interpreter, "M9", 2) == SIM_INTERP_OK);
assert(sim_interpreter_reset(&interpreter) == SIM_INTERP_OK);
assert(sim_interpreter_execute(&interpreter, "G0 X30 A20 C40", sizeof("G0 X30 A20 C40") - 1) == SIM_INTERP_OK);
assert(sim_interpreter_execute(&interpreter, "G10 L20 P1 X5", 13) == SIM_INTERP_OK);
assert(interpreter.state.x == 30.0);
assert(sim_interpreter_execute(&interpreter, "G0 X6", 5) == SIM_INTERP_OK);
assert(sim_interpreter_read_motion(&interpreter, &motion) == SIM_INTERP_OK);
assert(motion.start.tran.x == 30.0 && motion.end.tran.x == 31.0);
assert(sim_interpreter_execute(&interpreter, "G10 L20 P9 A5 C10", 17) == SIM_INTERP_OK);
assert(interpreter.state.a == 20.0 && interpreter.state.c == 40.0);
assert(sim_interpreter_execute(&interpreter, "G59.3 G0 A6 C11", 15) == SIM_INTERP_OK);
assert(sim_interpreter_read_motion(&interpreter, &motion) == SIM_INTERP_OK);
assert(motion.end.a == 21.0 && motion.end.c == 41.0);
return 0;
}