自制件状态查询

This commit is contained in:
Vergil
2020-03-27 09:00:44 +08:00
parent 4cb31e7331
commit 78ba74a980

View File

@@ -185,7 +185,7 @@ export default {
response.data.result[i].考核状态 = 3
} else if (response.data.result[i].考核状态 === 8) {
response.data.result[i].考核状态 = 4
} else if (response.data.result[i].考核状态 === 8) {
} else if (response.data.result[i].考核状态 === 9) {
response.data.result[i].考核状态 = 5
}
}